Embedded Systems Design with the Atmel AVR Microcontroller Part II

6.6. TIMER 0 SYSTEM 147
internally via the microcontroller’s main clock (fclk_I/O). This clock frequency may be too rapid
for many applications. Therefore, the timing system is equipped with a prescaler to subdivide the
main clock frequency down to timer system frequency (clkTn). The clock source for Timer 0 is
selected using the CS0[2:0] bits contained in the Timer/Counter Control Register B (TCCR0B).
The TCCR0A register contains the WGM0[1:0] bits and the COM0A[1:0] (and B) bits. Whereas,
the TCCR0B register contains the WGM0[2] bit.These bits are used to select the mode of operation
for Timer 0 as well as tailor waveform generation for a specific application.
Figure 6.6: Timer 0 block diagram. Figure used with permission Atmel, Inc.
The timer clock source (clkTn) is fed to the 8-bit Timer/Counter Register (TCNT0). This
register is incremented (or decremented) on each clkTn clock pulse. Timer 0 is also equipped with
two 8-bit comparators that constantly compares the numerical content of TCNT0 to the Output
Compare Register A (OCR0A) and Output Compare Register B (OCR0B). The compare signal
from the 8-bit comparator is fed to the waveform generators. The waveform generators have a
number of inputs to perform different operations with the timer system.