Embedded Systems Design with the Atmel AVR Microcontroller Part II

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212 CHAPTER 7. ATMEL <strong>AVR</strong> OPERATING PARAMETERS AND INTERFACING //function definitions //************************************************************************* //************************************************************************* unsigned char data_in(void) { DDRC = 0x00; //set PORTC for input PORTC = 0xFF; //pullup resistors return PINC; //read PORTC } //************************************************************************* void data_out(unsigned char data) { DDRC = 0xFF; //set PORTC for output PORTC = data; } //************************************************************************* void lcd_select_side (unsigned char side) { if(side == right) { PORTD = PORTD & 0xfd; //E=0 PORTD = PORTD & 0xfe; //D/I-=0 PORTD = PORTD | 0x10; //R/W-=1 PORTD = PORTD & 0xfb; //CS1=0 PORTD = PORTD | 0x08; //CS2=1 lcd_instruction_write(y_address); //y address } else { PORTD = PORTD & 0xfd; //E=0
} PORTD = PORTD & 0xfe; //D/I-=0 PORTD = PORTD | 0x10; //R/W-=1 PORTD = PORTD | 0x04; //CS1=1 PORTD = PORTD & 0xf7; //CS2=0 lcd_instruction_write(y_address); //y address } 7.4. OUTPUT DEVICES 213 //************************************************************************* void lcd_data_write(unsigned char data) { lcd_wait_busy(); PORTD = PORTD | 0x01; //D/I-=1 PORTD = PORTD | 0xef; //R/W-=0 data_out(data); PORTD = PORTD | 0x02; //E=1 delay(1); } //************************************************************************* void lcd_instruction_write(unsigned char instruction) { lcd_wait_busy(); PORTD = PORTD & 0xfe; //D/I-=0 PORTD = PORTD | 0xef; //R/W-=0 data_out(instruction); PORTD = PORTD | 0x02; //E=1 delay(1); } //************************************************************************* void lcd_set_pixel(unsigned char x, unsigned char˜(y)
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Embedded Systems Design with the At
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iv An Introduction to Logic Circuit
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Copyright © 2010 by Morgan & Clayp
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ABSTRACT This textbook provides pra
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x CONTENTS 7 6.9.3 Input Capture Mo
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xii CONTENTS A 8.5.3 Circuit diagra
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Preface In 2006 Morgan & Claypool P
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138 CHAPTER 6. TIMING SUBSYSTEM x(t
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142 CHAPTER 6. TIMING SUBSYSTEM 6.4
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262 CHAPTER 8. SYSTEM LEVEL DESIGN
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270 APPENDIX A. ATMEGA164 REGISTER
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272 APPENDIX A. ATMEGA164 REGISTER
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274 APPENDIX B. ATMEGA164 HEADER FI
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Author’s Biography STEVEN F. BARR
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296 INDEX switch debouncing, 187 sw
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