Predictive Control of Three Phase AC/DC Converters

4.8. SIMULATION RESULTS 65
200
150
100
50
(a)
0.8
0.6
0.4
0.2
500
400
300
200
100
(c)
u P a
u La ψ La
0.2 0.205 0.21 0.215 0.22
0
0
0
−50
−100
−150
−100
−0.2
−200
−0.4
−300
−0.6
−400
−200
0.2 0.205 0.21 0.215 0.22 −0.8
−500
0.2 0.205 0.21 0.215 0.22
15
10
(b)
2500
2000
(d)
P Q
i La
0.2 0.205 0.21 0.215 0.22
5
1500
0
1000
−5
500
−10
0
−15
0.2 0.205 0.21 0.215 0.22
−500
Figure 4.18: Steady state operation of VF-CSF-P-DPC: (a) line voltage u La [V]
and estimated virtual flux ψ La [Wb], (b) line current i La [A], (c) VSC input voltage
u P a [V], (d) referenced and measured active P [W] and reactive power Q [var]
Figure 4.19 shows converter voltage, measured between converter phase a input,
and negative DC bus u P aDC− as well as related number of transistor “on“
and “off “ switchings N Sa , per one cycle.
For VSF-P-DPC and FL-VSF-P-DPC, N Sa goes around 180 and 150 switchings
respectively, and in case of HC-VSF-P-DPC is about 325 what is caused by
two times higher sampling frequency F s .
Figure 4.19 shows also u P aDC− and N Sa for constant switching frequency
approach. It can be seen that there is no transistor switchings under maximum
current conduction. It allows to significantly reduce transistors commutation
loses.
Figure 4.20 shows line current i L harmonic spectrum up to 20 kHz. In case of
VSF-P-DPC and FL-VSF-P-DPC harmonic spectrum is spread over wide range of
frequencies. The HC-VSF-P-DPC allows to concentrate spectrum within desired
frequency (in presented case around 4 kHz Fig. 4.5 (a)). For constant switching
approach current spectrum is concentrated around maximum switching frequency
F swMax , which leads to sampling F s .
Table 4.7 summarizes T HD i factors. As it can been seen, the lowest T HD i
is achieved by CSF approach (around 3.5% – 3.6%), also HC-VSF-P-DPC has
low T HD i , however it is occupied by higher switching and sampling frequencies.