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Figure 4.9 P and Q Plane Capability with Constant Voltage and Angle X=0.1 pu. It must be noticed that there are several choices of the impedance that allow to deliver the P and Q inside the region, but each choice corresponds to a different inverter voltage and power angle. For what concerns the maximum inverter voltage, it can be noticed that with X= 0.2 pu, in Figure 4.8, there is a need to have a 1.12 pu inverter voltage to reach the coordinate P=1.0 pu, Q=0.75 pu. With X=0.1 pu the inverter voltage needs to be only 1.06 pu. It is manifest how the choice of the impedance affects the requirements on the inverter to reach the P and Q coordinates. For instance a lower DC bus voltage can be afforded when using X=0.1 pu rather than X=0.2 pu. The ideal design must keep into consideration the issue of DC bus magnitude because it is directly connected to the maximum voltage that the inverter can achieve. The inductance also affects the value of the minimum voltage that the inverter may need to synthesize when trying to reach high values of inductive reactive power. But this value is less critical because it can always be reached by means of a thinner modulation of the voltage waveform: on the contrary, the maximum voltage represents a real issue because its value determines the rating that the DC bus must have. In summary, a smaller size of the inductor corresponds to a lower cost, a lower requirement on the DC bus rating and a smaller range of power angle. The range of the power angle cannot be allowed to get too small to avoid errors in the power to become unacceptable. A compromise between angle resolution, inductor price and DC bus rating is key to obtain an ideal match between inverter capabilities and inductor. 58
4.4 System Ratings The inverter performs the task of converting the voltage from a DC level to the AC utility frequency. The output voltage level of the inverter is a free variable that can be changed with an appropriate choice of the turn ratio of the transformer. The inverter allows the flexibility of adopting a wide variety of prime movers. The output voltage of the inverter depends on the DC bus voltage and the modulation technique adopted. The inverter needs at the minimum to have enough ratings to supply the active rated power of the prime mover, but the final ratings need to be somewhat higher to be able to supply the reactive power necessary for voltage regulation. The silicon devices inside the inverter have thermal limits that need to be observed to guarantee their operation. These thermal limitations are translated in a maximum amount of continuous operation current that the devices can withstand without incurring in thermal runoff and being damaged. During faults the silicon can transiently sustain a 2 pu current for those few cycles that the protection takes to intervene and disconnect the source. It is possible to show how the maximum current on the device impacts the AC side rms current value. Assuming a power factor of 0.8 it is possible to calculate that the maximum reactive power injection is: PF = cos Q = P tan ( ϕ) ( ϕ) = P tan( a cos( PF) ) = 0.75 P When the inverter is operating at the maximum current output the voltage of the inverter will also be nearest it maximum possible value. This means that the modulation of the DC voltage has become very wide: to greatly simplify the analysis a six pulse operation of the bridge is assumed. This implies that each of the devices conduct for a half of the fundamental frequency period. Figure 4.10 shows the voltage source inverter that interfaces the DC bus voltage with AC sinusoidal current sources. These sources are assumed to be 120 degrees apart in each phase. I DC VDC + 1 3 5 C Ic(t) 2 4 6 B Ib(t) N A Ia(t) Figure 4.10 Voltage Source Inverter. The fundamental frequency AC side voltage magnitude is related to the DC voltage by the following expression [6]: 59
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PSERC Control and Design of Microgr
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Information about this project For
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Executive Summary Economic, technol
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Table of Contents Chapter 1. Introd
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List of Figures Figure 1.1 Microgri
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List of Figures (continued) Figure
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Chapter 1. Introduction Distributed
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1.2.2 Operation and Investment The
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Figure 1.1 Microgrid Architecture D
Page 19 and 20: Chapter 2. Static Switch The static
Page 21 and 22: ω ωo ω1 Preq Pgrid P Pload Figur
Page 23 and 24: 2.3 Synchronization Conditions The
Page 25 and 26: droop. The issue is that it is poss
Page 27 and 28: This synchronizing behavior is unac
Page 29 and 30: Figure 2.12 shows on the upper plot
Page 31 and 32: Chapter 3. Microsource Details This
Page 33 and 34: with different size. This control i
Page 35 and 36: u + _ K F ω o + _ ω o s P u ω o
Page 37 and 38: Q versus E Droop E req Q m Q _ + E
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Page 43 and 44: A 16 DG B 22 DG Static Switch C 8 D
Page 45 and 46: ω Unit 2 Max Unit 2 ω o Unit 1 ω
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Page 49 and 50: positive value. When this value has
Page 51 and 52: needs of power. This solution would
Page 53 and 54: This expression is very similar to
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Page 57 and 58: ω ω ω o Fo ω o Fo F F Unit Powe
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Page 65 and 66: Prime Mover DC Storage Voltage Sour
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Page 69: Figure 4.8 P and Q Plane Capability
Page 73 and 74: Switching Sequence 145 146 136 236
Page 75 and 76: generated by the inverter: the VA r
Page 77 and 78: % of voltage unbalance = 100 maximu
Page 79 and 80: Figure 5.2 shows the plots for P,Q
Page 81 and 82: Figure 5.5 shows the measures of P
Page 83 and 84: Figure 5.7 One Unit Connected to th
Page 85 and 86: Microsources are connected to the l
Page 87 and 88: The transformer impedance can be se
Page 89 and 90: o r 1 = 0.3277 Ω = 0.0547 Ω x x 1
Page 91 and 92: Table 6.3 Load Data Summary. Rated
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Page 95 and 96: The filtering is achieved by a low
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Page 105 and 106: Table 7.1 Summary of Experiments fo
Page 107 and 108: Table 7.2 Series Configuration Cont
Page 109 and 110: Figure 7.6 Control of F1 and F2, Fe
Page 111 and 112: Figure 7.10 Control of P1 and F2, F
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Page 115 and 116: Unit 1: P, Q, F, Frequency, Voltage
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Unit 1: P, Q, F, Frequency, Voltage
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7.4.1 Unit 1 (F), Unit 2 (F), Impor
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Import From Grid, Setpoints are 10%
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Island, Setpoints are 10% and 90% o
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7.4.2 Unit 1 (F), Unit 2 (F), Expor
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Export to Grid, Setpoints are 10% a
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7.4.3 Unit 1 (F), Unit 2 (P), Impor
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7.4.4 Unit 1 (F), Unit 2 (P), Expor
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Chapter 8. Conclusions This work sh
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[14] Lasseter, R.,” Microgrids,
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