Power Management Design Guide for Altera® FPGAs and CPLDs ...
Power Management Design Guide for Altera® FPGAs and CPLDs ...
Power Management Design Guide for Altera® FPGAs and CPLDs ...
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National power solutions <strong>for</strong> Cyclone <strong>FPGAs</strong><br />
Cyclone <strong>FPGAs</strong><br />
Altera’s Cyclone series of <strong>FPGAs</strong> provides the benefits of<br />
programmable logic at price points competitive with ASICs<br />
<strong>and</strong> ASSPs. Built from the ground up based on extensive<br />
input from hundreds of customers, these low-cost devices<br />
provide high-volume, application-focused features such as<br />
embedded memory, external memory interfaces, <strong>and</strong> clock<br />
management circuitry. Based on the cost-optimized all-layer<br />
copper 1.5V SRAM process, Cyclone <strong>FPGAs</strong> are available<br />
in densities ranging from 2,910 to 20,060 logic elements<br />
(LEs) with up to 294,912 bits of embedded RAM.<br />
Cyclone <strong>FPGAs</strong> support a variety of single-ended I/O<br />
st<strong>and</strong>ards such as LVTTL, LVCMOS, PCI, <strong>and</strong> SSTL-2/3<br />
<strong>and</strong> offer differential I/O support via the LVDS <strong>and</strong> RSDS<br />
I/O st<strong>and</strong>ards on up to 129 channels. Each channel is<br />
capable of operating LVDS signals at up to 640 Mbps.<br />
Cyclone devices feature dedicated circuitry to implement<br />
double data rate (DDR) SDRAM <strong>and</strong> FCRAM interfaces.<br />
LM2734/36 1A SOT-23 buck regulators<br />
• Complete, easy-to-use switcher solution has<br />
smallest footprint <strong>and</strong> highest power density in<br />
the industry<br />
• State-of-the-art 13 ns minimum ON-time allows<br />
<strong>for</strong> high conversion ratios without the need to<br />
reduce switching frequency or increase solution size<br />
• Choice of switching frequencies allows designers<br />
to trade off efficiency against solution size <strong>and</strong> EMI<br />
• Current mode control improves phase margin, line<br />
regulation <strong>and</strong> rejection of transients<br />
• PWM provides a predictable, easily filtered<br />
switching frequency <strong>for</strong> reduced output noise<br />
• Internal softstart circuitry, cycle-by-cycle, thermal<br />
shutdown, <strong>and</strong> over-voltage protection<br />
• Available in TSOT-23 packaging (1.0 mm height)<br />
The core of these <strong>FPGAs</strong> needs to be powered from a 1.5V<br />
source. Core current consumption (I CCINT ) depends upon<br />
utilization of the part (such as clock speed <strong>and</strong> internal<br />
elements used), but maximum values range from 0.75A<br />
to 5A (approx.) depending on the specific Cyclone device<br />
used. To calculate the most accurate power consumption<br />
values needed by a specific design, use Altera’s <strong>Power</strong><br />
Calculator tool (see www.national.com/see/alterafpga). As<br />
a general rule, choose a V CCINT power supply whose I OUT<br />
(I CCINT ) capability is within the I CCINT inrush <strong>and</strong> I CCINT<br />
maximum values given in this guide <strong>for</strong> the specific Altera<br />
device used.<br />
Another power management consideration is the monotonic<br />
rise of V CCINT . This consideration is critical <strong>for</strong> the correct<br />
operation of the FPGA. While many power supplies take<br />
this requirement into consideration, it is recommended to<br />
further support this requirement by the use of adequate<br />
bulk capacitance in the power supply.<br />
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LM2734 Simple block diagram<br />
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Feature LM2734 LM2736<br />
Input range 3.0V to 20V 3.0V to 18V<br />
Output load 1A 750 mA<br />
Output range 0.8V to 18V 1.25V to 16V<br />
Internal references 0.8V, 2% 1.25V, 2%<br />
Operating frequency<br />
550 kHz / 1.6 MHz / 3 MHz<br />
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