Power Management Design Guide for AlteraÂ® FPGAs and CPLDs ...

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National power solutions for MAX II CPLDs MAX II CPLDs The MAX II CPLD family is a non-volatile, instant-on programmable logic family with a new CPLD architecture, which allows significant power and density enhancements from previous MAX devices. Based on a 0.18-µm Flash process, the MAX II devices offer densities ranging from 240 to 2,210 logic elements (LEs) and up to 272 user I/O pins. The core of these CPLDs (V CCINT ) needs to be powered from a 1.8V source. The non-G versions of MAX II devices have an internal voltage regulator and the V CCINT pin can accept either 3.3V or 2.5V. This internal regulator steps down the voltage to the needed 1.8V. On the G-version MAX II CPLDs, the internal regulator is bypassed and V CCINT needs to be only 1.8V. Core current consumption (I CCINT ) depends upon utilization of the part (such as clock speed and internal elements used), but typical values range from 30 mA to 75 mA with maximum values in the 75 mA to 400 mA range. Typically, operating core current (I CCINT ) for MAX II devices National power solutions for MAX II CPLDs will be 10 mA less in the 1.8V G versions. The I/O current (I CCIO ) also depends upon the device utilization, with typical values in the 100 mA to 200 mA range. Maximum values can reach 225 mA per bank or 900 mA total for up to four banks. To calculate the most accurate power consumption values needed by your specific design, we recommend using Altera’s Power Calculator tool, available online. A good rule of thumb is to choose a V CCINT power supply whose I OUT (I CCINT ) capability is within the I CCINT inrush and I CCINT maximum values. As opposed to FPGAs, these CPLDs do not have specific requirements for monotonic voltage rise or V CCINT rise times. Since MAX II CPLDs consume low power, the use of LDOs and inductorless switching regulators is recommended. For LDOs, it is advised to check the thermal dissipation capability of the part based on the package and the operating conditions. It is not enough to check V IN , V OUT and I OUT alone for selecting LDOs. The LDOs recommended in the following tables address thermal dissipation capabilities. V IN = 3.3V V IN = 5V V IN = 12V V CCINT V CCINT = 1.8V V CCINT = 2.5V V CCINT = 3.3V I CCIO < 100 mA (LDO) LP3990-1.8 LP3990-1.8 LP2992-1.8 5 I CCIO < 100 mA (SW) LM2798-1.8 4 LM2798-1.8 4 LM2736 I CCIO < 150 mA (LDO) LP3990-1.8 LP3982-1.8 LP2992-1.8 5 I CCIO < 150 mA (SW) LM3670-1.8 3 LM3670-1.8 3 LM2736 I CCIO < 200 mA (LDO) LP3982-1.8 LP3982-1.8 Not applicable 1 I CCIO < 200 mA (SW) LM3670-1.8 3 LM3670-1.8 3 LM2736 I CCIO < 300 mA (LDO) LP3982-1.8 LP8345-1.8 Not applicable 1 I CCIO < 300 mA (SW) LM3670-1.8 3 LM3670-1.8 3 LM2736 I CCIO < 500 mA (LDO) LP8345-1.8 LP3874-1.8 Not applicable 1 I CCIO < 500 mA (SW) LM3671-1.8 3 LM3671-1.8 3 LM2736 I CCIO < 100 mA (LDO) LP3990-2.5 LP3990-2.5 LM2937-2.5 or LP2992-2.5 5 I CCIO < 100 mA (SW) LM3352-2.5 4 LM3352-2.5 4 LM2736 I CCIO < 150 mA (LDO) LP3990-2.5 LP3982-2.5 LM2937-2.5 or LP2992-2.5 5 I CCIO < 150 mA (SW) LM3352-2.5 4 LM3352-2.5 4 LM2736 I CCIO < 200 mA (LDO) LP3982-2.5 LP3982-2.5 LM2937-2.5 or LP2992-2.5 5 I CCIO < 200 mA (SW) LM3352-2.5 4 LM3352-2.5 4 LM2736 I CCIO < 300 mA (LDO) LP3982-2.5 LP8345-2.5 Not applicable 1 I CCIO < 300 mA (SW) LM3670-2.5 3 LM3670-2.5 3 LM2736 I CCIO < 500 mA (LDO) LP2989-2.5 LP3874-2.5 Not applicable 1 I CCIO < 500 mA (SW) LM3671-Adj 3 LM3671-Adj 3 LM2736 I CCIO < 100 mA (LDO) — LP3990-3.3 LM2937-3.3 or LP2986-3.3 5 I CCIO < 100 mA (SW) — LM3352-3.3 4 LM2736 I CCIO < 150 mA (LDO) — LP3990-3.3 LM2937-3.3 or LP2986-3.3 5 I CCIO < 150 mA (SW) — LM3352-3.3 4 LM2736 I CCIO < 200 mA (LDO) — LP3982-3.3 LM2937-3.3 or LP2986-3.3 5 I CCIO < 200 mA (SW) — LM3352-3.3 4 LM2736 I CCIO < 300 mA (LDO) — LP3982-3.3 Not applicable 1 I CCIO < 300 mA (SW) — LM3670-3.3 3 LM2736 I CCIO < 500 mA (LDO) — LP8345-3.3 Not applicable 1 I CCIO < 500 mA (SW) — LM3671-Adj 3 LM2736 10
MAX II CPLDs MAX II power requirements summary EPM240 EPM240G EPM570 EPM570G EPM1270 EPM1270G EPM2210 EPM2210G V CCINT (V core) 3.3 or 2.5V 1.8V 3.3 or 2.5V 1.8V 3.3 or 2.5V 1.8V 3.3 or 2.5V 1.8V I CCINT max 5 (I core) 75 mA 75 mA 125 mA 125 mA 250 mA 250 mA 400 mA 400 mA I CCINT inrush (startup inrush max) 65 mA 55 mA 65 mA 55 mA 65 mA 55 mA 65 mA 55 mA V CCIO options (V I/O) 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V 3.3, 2.5, 1.8, 1.5V I CCIO max (I I/O) 450 mA (both banks) 450 mA (both banks) 450 mA (both banks) 450 mA (both banks) 900 mA (all 4 banks) 900 mA (all 4 banks) 900 mA (all 4 banks) 900 mA (all 4 banks) National power solutions for MAX II CPLDs (cont.) V IN = 3.3V V IN = 5V V IN = 12V 6 V CCIO V CCIO = 1.5V V CCIO = 1.8V V CCIO = 2.5V V CCIO = 3.3V I CCIO < 100 mA (LDO) LP3990-1.5 LP3990-1.5 LP2986-Adj 5 I CCIO < 100 mA (SW) LM2798-1.5 4 LM2798-1.5 4 LM2736 I CCIO < 200 mA (LDO) LP3982-Adj LP3982-Adj Not applicable 1 I CCIO < 200 mA (SW) LM2770-1.5 4 LM2770-1.5 4 LM2736 I CCIO < 300 mA (LDO) LP3982-Adj LP8345-Adj Not applicable 1 I CCIO < 300 mA (SW) LM3670-1.5 3 LM3670-1.5 3 LM2736 I CCIO < 500 mA LM3671-1.5 3 LM3671-1.5 3 LM2736 I CCIO < 750 mA LM2736 LM2736 LM2736 I CCIO < 1A LM2734 LM2734 LM2734 I CCIO < 100 mA (LDO) LP3990-1.8 LP3990-1.8 LP2992-1.8 5 I CCIO < 100 mA (SW) LM2798-1.8 4 LM2798-1.8 4 LM2736 I CCIO < 200 mA (LDO) LP3982-1.8 LP3982-1.8 Not applicable 1 I CCIO < 200 mA (SW) LM3670-1.8 3 LM3670-1.8 3 LM2736 I CCIO < 300 mA (LDO) LP3982-1.8 LP8345-1.8 Not applicable 1 I CCIO < 300 mA (SW) LM3670-1.8 3 LM3670-1.8 3 LM2736 I CCIO < 500 mA LM3671-1.8 3 LM3671-1.8 3 LM2736 I CCIO < 750 mA LM2736 LM2736 LM2736 I CCIO < 1A LM2734 LM2734 LM2734 I CCIO < 100 mA (LDO) LP3990-2.5 LP3990-2.5 LM2937-2.5 or LP2992-2.5 5 I CCIO < 100 mA (SW) LM3352-2.5 4 LM3352-2.5 4 LM2736 I CCIO < 200 mA (LDO) LP3982-2.5 LP3982-2.5 LM2937-2.5 or LP2992-2.5 5 I CCIO < 200 mA (SW) LM3352-2.5 4 LM3352-2.5 4 LM2736 I CCIO < 300 mA (LDO) LP3982-2.5 LP8345-2.5 Not applicable 1 I CCIO < 300 mA (SW) LM3670-2.5 3 LM3670-2.5 3 LM2736 I CCIO < 500 mA LP2989-2.5 LM3671-Adj 3 LM2736 I CCIO < 750 mA LM2736 LM2736 LM2736 I CCIO < 1A LM2734 LM2734 LM2734 I CCIO < 100 mA (LDO) — LP3990-3.3 LM2937-3.3 or LP2986-3.3 5 I CCIO < 100 mA (SW) — LM3352-3.3 4 LM2736 I CCIO < 200 mA (LDO) — LP3982-3.3 LM2937-3.3 or LP2986-3.3 5 I CCIO < 200 mA (SW) — LM3352-3.3 4 LM2736 I CCIO < 300 mA (LDO) — LP3982-3.3 Not applicable 1 I CCIO < 300 mA (SW) — LM3670-3.3 3 LM2736 I CCIO < 500 mA — LP8345-3.3 LM2736 I CCIO < 750 mA — LM2736 LM2736 I CCIO < 1A — LM2734 LM2734 1 LDO option not applicable due to thermal constraints (heat dissipation) for the given operating conditions. 2 Buck regulator. Good efficiency, simple implementation, with WEBENCH design tools available. 3 Synchronous buck converter. Maximum efficiency, no external diode required. 4 Inductorless switching regulator. 5 Use LLP package for adequate thermal dissipation. 6 These solutions can be used with input voltages from 8V to 14V. 11
Page 1 and 2: Power Management Design Guide for A
Page 3 and 4: Contents Featured power products fo
Page 5 and 6: Selecting the best power architectu
Page 7 and 8: Stratix II FPGAs Stratix II power r
Page 9 and 10: Stratix FPGAs Stratix power require
Page 11: Cyclone FPGAs Cyclone power require
Page 15 and 16: Monotonic voltage rise Although not
Page 17 and 18: Stratix II & Stratix FPGAs Stratix
Page 19 and 20: Stratix II & Stratix FPGAs Stratix
Page 21 and 22: MAX II CPLDs MAX II Complete Pow
Page 23 and 24: High-speed data conversion ICs Prod
Page 25 and 26: Select voltage supervisors/power-on
Page 27 and 28: Featured power management solutions

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