Power Management Design Guide for Altera® FPGAs and CPLDs ...

Reference designs
Stratix II & Stratix FPGAs
Stratix II/Stratix* Complete Power Supply Reference Design
(5V in, 1.20V @ 9A, 2.5V @ 6A and 3.3V @ 0.3A out)
This reference design features the high-current, low inputvoltage
LM2743 synchronous buck switching controller
and the low-power LP3981 LDO to offer a complete
power supply solution for a typical Stratix II application.
The LM2743 can be used for output currents from 1A
up to 25A. Output voltage on this part can be adjusted
anywhere down to 0.6V. For this Stratix II design, the
output voltage has been programmed in the LM2743 to
supply 1.20V for V CCINT and 2.5V for V CCIO . This same
reference design can be used for Stratix FPGAs by simply
changing V CCINT to 1.5V. This can be done by changing
R8 from 2 kΩ to 1.33 kΩ.
In the following pages you will find various V CCINT and
V CCIO reference designs that can be used in different
combinations to provide the most adequate power supply
solution for different I CCINT and I CCIO requirements when
powering Altera’s Stratix II, Stratix, and Cylcone FPGAs.
For additional information on these reference designs,
such as complete bills of material, test waveforms, and
performance reports, visit:
www.national.com/see/alterafpga
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