Hardware Interface Description - Wireless Data Modules

MC55/56 Hardware Interface Description
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Figures
Figure 1: MC55/56 block diagram ..........................................................................................21
Figure 2: Power supply limits during transmit burst................................................................26
Figure 3: Power-on by ignition signal .....................................................................................28
Figure 4: Timing of power-on process if VDDLP is not used..................................................29
Figure 5: Timing of power-on process if VDDLP is fed from external source.........................29
Figure 6: Deactivating GSM engine by /EMERGOFF signal..................................................33
Figure 7: Schematic of approved charging transistor, trickle charging and ESD protection ..38
Figure 8: Battery pack circuit diagram....................................................................................39
Figure 9: Charging process....................................................................................................41
Figure 10: Timing of /CTS signal (example for a 2.12 s paging cycle)...................................46
Figure 11: Beginning of power saving if CFUN=5 or 7...........................................................46
Figure 12: RTC supply from capacitor....................................................................................50
Figure 13: RTC supply from rechargeable battery .................................................................50
Figure 14: RTC supply from non-chargeable battery .............................................................50
Figure 15: Serial interfaces ....................................................................................................51
Figure 16: Audio block diagram..............................................................................................54
Figure 17: Schematic of microphone inputs ...........................................................................55
Figure 18: DAI timing on transmit path...................................................................................57
Figure 19: DAI timing on receive path ....................................................................................57
Figure 20: SIM card holder of DSB45 Support Box................................................................60
Figure 21: Pin numbers of Molex SIM card holder on DSB45 Support Box...........................60
Figure 22: SYNC signal during transmit burst ........................................................................62
Figure 23: LED Circuit (Example)...........................................................................................64
Figure 24: Incoming voice call................................................................................................65
Figure 25: Incoming data call .................................................................................................65
Figure 26: URC transmission .................................................................................................65
Figure 27: U.FL-R-SMT connector .........................................................................................67
Figure 28: Antenna pad and GND plane ................................................................................67
Figure 29: Never use antenna connector and antenna pad at the same time .......................68
Figure 30: Restricted area around antenna pad.....................................................................68
Figure 31: Mechanical dimensions of U.FL-R-SMT connector...............................................70
Figure 32: U.FL-R-SMT connector with U.FL-LP-040 plug ....................................................71
Figure 33: U.FL-R-SMT connector with U.FL-LP-066 plug ....................................................71
Figure 34: Specifications of U.FL-LP-(V)-040(01) plug ..........................................................72
Figure 35: Pin assignment (top view on MC55/56) ................................................................75
Figure 36: Typical current consumption vs. power control level.............................................84
Figure 37: Typical current consumption vs. return loss..........................................................85
Figure 38: Audio programming model ....................................................................................87
Figure 39: MC55/56 – top view ..............................................................................................94
Figure 40: MC55/56 bottom view ...........................................................................................94
Figure 41: Mechanical dimensions of MC55/56 .....................................................................95
Figure 42: Mounting holes on MC55/56 .................................................................................96
Figure 43: Hirose DF12C receptacle on MC55/56 .................................................................97
Figure 44: Header Hirose DF12 series...................................................................................97
Figure 45: Mechanical dimensions of Hirose DF12 connector...............................................98
Figure 46: Reference equipment for approval........................................................................99
Figure 47: Schematic diagram of MC55/56 sample application ...........................................103
MC55/56_hd_v02.06 Page 5 of 105 29.10.2004