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Blackfly - CYLOD

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Point Grey <strong>Blackfly</strong> Technical Reference<br />

Appendix C: Control and Status Registers<br />

Field Bit Description Frame-Specific Information<br />

CSR_Abs_Value [16]<br />

Toggles between displaying 32-bit relative or absolute CSR values. If absolute value not<br />

supported, relative value is displayed.<br />

0: Relative, 1: Absolute<br />

Insert_Info<br />

This field is currently read-only<br />

[17-21] Reserved<br />

[22]<br />

Region of Interest (ROI) position (See page 57)<br />

[23] GPIO Pin State<br />

[24] Strobe Pattern Counter<br />

[25] Frame Counter<br />

[26] Display image-specific information<br />

White Balance CSR<br />

[27] 0: Off 1: On<br />

Exposure CSR<br />

[28] Brightness CSR<br />

[29] Shutter Value<br />

[30] Gain CSR<br />

[31] Timestamp (See page 57)<br />

C.10 PIXEL_DEFECT_CTRL: 1A60h<br />

Format:<br />

Field Bit Description<br />

Presence_Inq [0]<br />

ON_OFF [6]<br />

[1-5] Reserved<br />

[7] Reserved<br />

Presence of this feature<br />

0: Not Available, 1: Available<br />

Enable or disable FPGA pixel correction<br />

0: Off, 1: On<br />

Max_Pixels [8-19] Maximum number of pixels that can be corrected by the FPGA<br />

Cur_Pixels [20-31] Current number of pixels that are being corrected by the FPGA<br />

Revised 12/13/2012<br />

Copyright ©2012 Point Grey Research Inc.<br />

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