mitsubishi - Al Kossow's Bitsavers

, MITSUBISHI MICROCOMPUTERSMELPS 8-48 MICROCOMPUTERSFUNCTION OF MELPS 8-48 MICROCOMPUTERSINTERRUPTThe. CPU recognizes an external interrupt by a low-levelstate at the INT terminal. A ''Wired-OR'' connection canbe used for checking multiple interrupts.The INT terminal is tested for an interrupt request at theALE signal output of every machine cycle. When an interruptis recognized and accepted, control is transferred tothe interrupt handling program. This is accomplished by anunconditional jump to address 3 of program memor¥,which is the start of the interrupt handling program, at thesame time the program counter and 4 high-order bits ofPSW are automatically moved to the top of the stack.The interrupt level is one, so the next interrupt cannotbe accepted until the current interrupt processing has beencomple~d. The RETR instruction terminates the interruptprocessing. That is to say, the next interrupt can not be accepteduntil the RETR instruction is executed. The nextinterrupt can be accepted at the start of the second cycle ofthe R ETR instruction (2-cycle instruction). Time/eventcounter overflow which causes an interupt request also willnot be accepted.After the processing for an interrupt is completed controlis returned to the main program. This is accomplishedby executing RETR which restores the program counterand PSW automatical and checks INT and the time/eventcounter overflow for an interrupt request. If there is aninterrupt request, the control will not be returned to themain program but will be transferred to the interrupt handlingprogram.An external interrupt has a higher priority than a timerinterrupt. This means that, if an external and timer interruptrequest are generated at the same time, the externalinterrupt has the priority and will be accepted first.When a second level of external interrupt is required,the timer interrupt, if not being used, can provide this.The procedure for this is to first disable the timer interrupt,set the timer/event counter to FF16 and put the CPUin the event counter mode. After this has been done, if T 1input is changed to low-level from high-level, an interruptis generated in address 7.Terminal INT can also be tested using a conditionaljump instruction. For more details on this procedure, checkthe "Conditional Jumps Using Terminals To, T 1 and I NT"section.TIMER/EVENT COUNTERThe timer/event counter for the MELPS 8-48 is an 8-bitcounter, that is used to measure time delays or count externalevents. The same counter is used to measure time delaysor count external events by simply changing the inputto the counter.The. counter can be initialized by executing an MOV T,A instruction. The value of the counter can be read forchecking by executing an MOV A, T instruction. Reset willstop the counting but the counter is not cleared, so countingcan be resumed.The largest number the counter can contain is FF16 . Ifit is incremented by 1 when it contains FF16 , the counterwill be reset to 0, the overflow flag is set and a timer interruptrequest is generated.The conditional jump instruction JTF can be used totest the overflow flag. Care must be used in executing theJTF instruction because the overflow flag is cleared (reset)when executed. When a timer interrupt is accepted, thecontrol is transferred to address 7 of program memory.When both a timer and external interrupt request areg,enerated at the same time, the external interrupt is givenpriority and will be accepted first by automatically jumpingto address 3 of program memory. The timer interruptrequest is kept and will be processed when the externalinterrupt has been completed and a PETR is executed. Alatched timer interrupt request is cancelled when a timerinterrupt request is generated. A timer interrupt request canbe disabled by executing a 0 IS TCNTI instruction.The STRT CNT instruction is used to change the counterto an event counter. Then terminal T 1 signal becomesthe input to the event counter and an event is counted eachfull cycle (low-high-Iow one event). The maximum rate thatcan be counted is one time in 3 machine cycles (7.5J.Lswhen using 6MHz crystal). The high-level at Tl must bemaintained at least 1/5 of the cycle time (500ns whenusing 6MHz crystal).4-10 • . MITSUBISHI.... ELECTRIC