mitsubishi - Al Kossow's Bitsavers

MITSUBISHI MICROCOMPUTERSMELPS 8-48 MICROCOMPUTERSFUNCTION OF MELPS 8·48 MICROCOMPUTERSRESE.The reset terminal is for resetting the CPU. A Schmitt triggercircuit along with a pull-up register are connected to iton the chip. A reset can easily be generated by attaching al~F as capacitor as shown in Fig. 13. An external resetpulse applied at RESET must remain at low-level for atleast 50ms after power has been turned on and reached itsnornial level.The reset function causes the following initializationwithin the CPU.1. Program counter is reset to O.2. Stack pointer is reset to O.3. Register bank is reset to O.4. Memory bank is reset to O. '5. Data bus is cleared to high-impedance state.6. Ports 1 and 2 are reset to input mode.7. External and timer interrupts are reset to disablestate.8. Timer is stopped.9. Timer overflow flag is cleared.10. Flags Fo and F. are cleared.11. Clock output for terminal To is disabled.Note 1:On the M5L8748S the RESET terminal, in addition to being used for thereset function, is also used when reading and writing data inthe EPROMon the ch ip. Oetails on this will be found in the section on reading andwriting data in th~ M5L8748S,SING LE-STEP OPERATIONThe terminal SS on the MELPS 8-48 is provided to facilitatesingle-step operation. In single-step operation, the CPUstops after the execution of each instruction is completedand the memory address (12 bits) of the next instructionto be fetched is output through the data bus (8 bits) plusthe low-order 4 bits of port 2 (P 20 ""P 23 ). The user can'use this to trace the flow of this pro~ram instruction byinstruction and will find this an aid in program debugging.Single-step operation is controlled through SS and ALE asshown in Fig. 14.5V(a)SINGLE·STEPMODE5V5VCLOCK10kQBUFFERExample of single step circuit55M5L8048-XXXPALEMELPS8-485VDATA BUS ~ :00- 08 TH, E, LOW-ORDER 8 BITS OF PC(PCa-- PC7)~--~------~~--------~THELOW-ORDER4 BITS OFPORT 2P2o- P2 3THE HIGH·ORDER 4 BITS OF PC(PCs-PC,,)1 Ff tLW,10VABOUT200kn(b) Single-step operation timingIEXECUTING"IEINSTRUCTIONFig. 13 Example of a reset circuitFig.14 Single-step operation circuit and timingA type D flip-flop with preset and reset terminals, as shownin Fig. 11, is used to generate the signal for SS. When thepreset terminal goes to low-level, SS goes to high-level,which puts the CPU in RUN mode. When the preset terminalis grounded it goes to high-level. Then SS goes to lowlevel.When SS goes to low-level, the CPU stops. Then whenthe push-button switch is pushed, a pulse is sent to theclock terminal of the type D flip-flop which turns SS tohigh-level. When SS goes to high-level the CPU fetches the4-12 'MITSUBISHI.... ELECTRIC