Test During Burn-in Evolution - BiTS Workshop

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Flexible Device ManagementuCPSPOWERSUPPLIESFPGAIOIOCHANNELSMEMDevice specific algorithms (not only flat vectors) runon the tester electronics and on the device under test3/19/2003 Strategic Use of <strong>Burn</strong> In (Tamas Kerekes) 19
Example: Bitmap3/19/2003 Strategic Use of <strong>Burn</strong> In (Tamas Kerekes) 20
Page 1: Burn-in & TestSocket WorkshopWELCOM
Page 4 and 5: Full Wafer ContactBurn-In and Test-
Page 6 and 7: Test During Burn-in Evolution• Ba
Page 8 and 9: Value of Offloading Final Test• I
Page 10 and 11: Parallel Test During Burn-inPre Bur
Page 12 and 13: Wafer-Level Burn-In and Test• Ful
Page 14 and 15: Test Evolution - External Test• F
Page 16 and 17: Wafer-Level Burn-in with BIST• Lo
Page 18 and 19: Wafer-Level Logic Test, BISTLoadAli
Page 20 and 21: Strategic Use of Burn In2003 Burn-i
Page 22 and 23: Pressure on the Burn-In
Page 24 and 25: Technology Trends‣ Low geometry
Page 26 and 27: Dilemmacostvalue?1 + 1 + 1 = 1Scree
Page 28 and 29: Increasing the Value of Burn-In
Page 30 and 31: Possible Added Values Yield increas
Page 32 and 33: Yield Increase During ramp-up (time
Page 34 and 35: Area Management Statistical Process
Page 36 and 37: Key Factors Equipment Data manageme
Page 40 and 41: Example: Distribution400.000350.000
Page 42 and 43: Development ToolsSPECIFICATIONSAPPL
Page 44 and 45: TeamworkDesignerProcess EngineerTes
Page 46 and 47: Case Study 1:High Coverage Qualific
Page 48 and 49: Case Study 3:TDBI on Embedded NVM E
Page 50 and 51: thank youfor your time andconsidera
Page 52 and 53: Agenda• Background• Objectives
Page 54 and 55: Objectives• To have better toolin
Page 56 and 57: Interconnect MaterialShin-Etsu Inte
Page 58 and 59: Prototype Evaluations DataTime-Doma
Page 60 and 61: Prototype Evaluations DataFrequency
Page 62 and 63: Prototype Evaluations DataA short p
Page 64: Conclusions• With the data collec

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