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SAT Solving and SMT Solving<br />
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Satisfiability (SAT) Solvers<br />
– Input: system of boolean formulas<br />
– Output: SAT/UNSAT, Witness (aka “model” for SAT)<br />
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SAT Modulo Theory (SMT) Solvers<br />
– Combine SAT solving <strong>with</strong> higher-level theories, such as:<br />
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A: Arrays <strong>with</strong> extensionality<br />
UF: Uninterpreted functions<br />
BV: Bit vectors <strong>with</strong> arithmetic<br />
I: Unbound integer arithmetic, …<br />
– Usually significantly faster than plain SAT solvers when higher-level theories are used to preserve the<br />
problem structure. (e.g. using (bvadd) instead of system of boolean formulas for adder circuit)<br />
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SMT-LIB2 File Format<br />
– There is an annual competition for SMT solvers called SMT-COMP<br />
– All benchmarks used in SMT-COMP are in the SMT-LIB2 file format<br />
– So practically all SMT solvers support the SMT-LIB2 file format<br />
– <strong>Yosys</strong>-<strong>SMTBMC</strong> can use any SMT solver <strong>with</strong> support for the SMT-LIB2 QF_AUFBV logic
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