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cycle3.tpl<br />
(setlogic QF_UFBV)<br />
; insert the autogenerated code here<br />
%%<br />
; declate three states<br />
(declarefun s1 () cycle3_s)<br />
(declarefun s2 () cycle3_s)<br />
(declarefun s3 () cycle3_s)<br />
; setup three states<br />
(assert (and (cycle3_h s1) (not (cycle3_is s1))))<br />
(assert (and (cycle3_h s2) (not (cycle3_is s2))))<br />
(assert (and (cycle3_h s3) (not (cycle3_is s3))))<br />
...