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Artificial Intelligence and Soft Computing: Behavioral ... - Arteimi.info

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22.6 Conclusions<br />

The chapter started with a SIMD architecture for parallel heuristic search <strong>and</strong><br />

then gradually explored the scope of parallelism in production systems <strong>and</strong><br />

logic programming.<br />

The chapter emphasized a new scheme for analyzing logic programs by<br />

Petri nets <strong>and</strong> presented an efficient realization of the proposed scheme on a<br />

high speed parallel inference engine. The proposed system can resolve at most<br />

5 clauses one at a time. With extra hardware resources, this limit of 5 clauses<br />

can be extended to as many as desired.<br />

Principles of resolution employed in Petri nets do not violate the<br />

soundness <strong>and</strong> completeness of the fundamental resolution theorem of<br />

predicate logic. Further the mapping from Petri nets to logic architecture too<br />

does not add any extra constraints to the resolution theorem <strong>and</strong> thus does not<br />

pose questions to the soundness <strong>and</strong> completeness of the inferential<br />

procedures realized on the architecture.<br />

The timing analysis of the proposed inference engine elucidates the<br />

basis of parallelism <strong>and</strong> pipelining among the various modulus of the inference<br />

engine. It is evident from the analysis that the transition firing requires 25<br />

clock cycles, which is insignificantly small compared to memory access <strong>and</strong><br />

comparison times in SLD programs.<br />

The compiler for the proposed system serves two purposes. First it<br />

acts as a parser to the syntax of a given logic program. Secondly, it maps the<br />

variables, constants <strong>and</strong> predicates onto different modules of the architecture<br />

<strong>and</strong> initializes the flags of the system. The construction of the compiler <strong>and</strong><br />

the VLSI testing of the architecture is under progress.<br />

The complete realization of the parallel inference engine will serve as a<br />

new type database machine. Furthermore, it will be able to realize ‘datalog<br />

programs’ on efficient inference engines <strong>and</strong> demonstrate an alternate means<br />

to answer queries on high speed architecture.<br />

Exercises<br />

1. Determine which of the following rules are input dependent, output<br />

dependent, interface dependent, input-output dependent <strong>and</strong> output-input<br />

dependent on others. Hence, determine the compatible rules.

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