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E200Z1RM, e200z1 Power Architecture Ž Core - Reference Manual

E200Z1RM, e200z1 Power Architecture Ž Core - Reference Manual

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<strong>e200z1</strong> Overview<br />

32-bit Virtual and Physical Addresses<br />

8-bit Process Identifier<br />

8-entry Fully-associative TLB<br />

Support for multiple page sizes from 4-Kbyte to 4-Gbyte<br />

Entry Flush Protection<br />

<strong>e200z1</strong> <strong>Power</strong> <strong>Architecture</strong> <strong>Core</strong> <strong>Reference</strong> <strong>Manual</strong>, Rev. 0<br />

1-6 Freescale Semiconductor

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