E200Z1RM, e200z1 Power Architecture Ž Core - Reference Manual

Contents
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Number Title
e200z1 Power Architecture Core Reference Manual, Rev. 0
Page
Number
2.4.16 MMU Configuration Register (MMUCFG) .............................................................. 2-21
2.4.17 TLB Configuration Registers (TLB0CFG, TLB1CFG)............................................. 2-22
2.5 SPR Register Access...................................................................................................... 2-22
2.5.1 Invalid SPR References ............................................................................................. 2-22
2.5.2 Synchronization Requirements for SPRs................................................................... 2-22
2.5.3 Special Purpose Register Summary........................................................................... 2-23
2.5.4 Reset Settings.............................................................................................................2-26
Chapter 3
Instruction Model
3.1 Unsupported Instructions and Instruction Forms............................................................. 3-1
3.2 Optionally Supported Instructions and Instruction Forms............................................... 3-1
3.3 Implementation Specific Instructions .............................................................................. 3-2
3.4 Book E Instruction Extensions ........................................................................................ 3-2
3.5 Memory Access Alignment Support................................................................................ 3-3
3.6 Memory Synchronization and Reservation Instructions.................................................. 3-3
3.7 Branch Prediction ............................................................................................................3-4
3.8 Interruption of Instructions by Interrupt Requests........................................................... 3-4
3.9 New e200 Instructions ..................................................................................................... 3-4
3.9.1 ISEL APU.................................................................................................................... 3-4
3.9.2 Debug APU..................................................................................................................3-5
3.9.3 WAIT APU .................................................................................................................. 3-6
3.10 Unimplemented SPRs and Read-Only SPRs ................................................................... 3-7
3.11 Invalid Forms of Instructions........................................................................................... 3-7
3.11.1 Load and Store with Update Instructions .................................................................... 3-7
3.11.2 Load Multiple Word (lmw, e_lmw) Instruction........................................................... 3-7
3.11.3 Branch Conditional to Count Register Instructions..................................................... 3-8
3.11.4 Instructions with Reserved Fields Non-Zero............................................................... 3-8
3.12 Instruction Summary........................................................................................................ 3-8
3.12.1 Instruction Index Sorted by Mnemonic ....................................................................... 3-9
3.12.2 Instruction Index Sorted by Opcode .......................................................................... 3-20
3.13 Optionally Supported APU Instructions ........................................................................ 3-30
Chapter 4
Instruction Pipeline and Execution Timing
4.1 Overview of Operation .................................................................................................... 4-1
4.1.1 Control Unit ................................................................................................................. 4-2
4.1.2 Instruction Unit............................................................................................................ 4-3
4.1.3 Branch Unit.................................................................................................................. 4-3
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