ECK-3699GF Embedded System User Manual - ICP America

ECK-3699GF Embedded System
components such as CAS and bank cycle time as well as valid settings for the module and
the manufacturer's code. The SPD enables the BIOS to read the spec sheet of the DIMMs
on boot-up and then adjust the memory timing parameters accordingly.
Disabled DRAM timing parameters are manually set using the
DRAM sub-items
Enabled DEFAULT DRAM timing parameter are set according to the
DRAM Serial Presence Detect (SPD)
If the Configure DRAM Timing by SPD option is disabled, the following configuration
options appear.
• DRAM CAS# Latency [3]
• DRAM RAS# to CAS# Delay [5 DRAM Clocks]
• DRAM RAS# Precharge [5 DRAM Clocks]
• DRAM RAS# Activate to Precha [15 DRAM Clocks]
Memory Hole [Disabled]
Use the Memory Hole option to reserve memory space between 15MB and 16MB for ISA
expansion cards that require a specified area of memory to work properly. If an older ISA
expansion card is used, please refer to the documentation that came with the card to see if
it is necessary to reserve the space.
Disabled DEFAULT Memory is not reserved for ISA expansion cards
15MB – 16MB
Between 15MB and 16MB of memory is reserved for
ISA expansion cards
Boots Graphics Adapter Priority [PEG/PCI]
Use the Boots Graphics Adapter Priority option to select the graphics controller used as
the primary boot device. Select either an integrated graphics controller (IGD) or a
combination of PCI graphics controller, a PCI express (PEG) controller or an IGD.
Configuration options are listed below:
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