Application Note AN-1150 - International Rectifier

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For a Constant Power Load, the shunt impedance and the system load cancel each other out and the equivalent impedance is infinite, in which case the transfer function reduces to: vout 1 = i sC chg In the power stage transfer function, this is represented by a pole at the origin. Under a Constant Current Load, since the impedance of a current source is infinitely high, the equivalent impedance is effectively just the shunt impedance: vout RL = i 1 + sC RL In the power stage transfer function, this is represented by a pole: 1 f PS = 2π ⋅C R chg Next (i CHG /i L ) transfer function has to be evaluated. Assuming 100% efficiency, recognize that: V IN .I L = V OUT I OUT I OUT is same as the DC component of the boost diode current (I CHG ). Hence V IN .I L = V OUT I CHG Applying linearization and small-signal analysis, for a given DC operating point defined by V IN & V OUT yields the relationship between i CHG & i L : i CHG /i L = V IN /V OUT Assuming a resistive load, the overall power stage transfer function can now be written as: V G( s) = V IN OUT out out out RL × 1+ sC L / 2 out R 2 L OCC PFC Modulator, H 3 (s) In order to derive i L /v m , the One Cycle Control PWM modulator control law is employed: v m G DC ⋅ RS ⋅iL = M (d) where M(d) = V OUT /V IN for a given DC operating point defined by the DC bus voltage V OUT and RMS input voltage V IN . This ultimately yields L H 3 ( s) = = vm i V OUT V R in S G DC www.irf.com AN-1150 20
Output voltage sensor Resistor-Divider, H 1 (s) The output divider scales the output voltage to be compared with the reference voltage in the error amplifier. Therefore: V OUT ( R = FB1 + RFB2 + RFB3) VREF R V H 1 ( s) = V The uncompensated loop gain and phase is shown in Fig.9 for 85-264VAC at 350W load condition (assuming resistive load). This is simply the H 1 (s).H 3 (s).G(s) transfer function product illustrating the pole due to the plant gain. FB3 REF OUT 90 60 30 0 Gain 85VAC Uncompensated Gain 264VAC Uncompensated Phase 85VAC Uncompensated Phase 264VAC Uncompensated 90 60 30 0 Gain (dB) -30 -60 -90 -120 -150 -30 -60 -90 -120 -150 Phase (deg) -180 -180 0.01 0.1 1 10 100 1000 10000 100000 f (Hz) Fig.9 The uncompensated transfer function [=H 1 (s).H 3 (s).G(s)] Error Amplifier & Compensation, H 2 (S) The compensation scheme typically employed for a first-order, single-pole system aims to: • add a pole at the origin in order to increase the low frequency gain and improve DC regulation • add a low-frequency zero to boost phase margin near cross-over frequency and partially compensate the pole • add a high-frequency pole to attenuate switching frequency noise and ripple effects The above 3 requirements can be achieved in case of the transconductance type voltage error amplifier with the compensation scheme shown in Fig.10. However, www.irf.com AN-1150 21
Page 1 and 2: Application Note AN-1150 Power Fact
Page 3 and 4: • VFB - provides DC bus voltage s
Page 5 and 6: one of the comparator misbehaves, t
Page 7 and 8: 3.2 Power Circuit Design AC Line Br
Page 9 and 10: High Frequency Input Capacitor (C I
Page 11 and 12: V 4.7V ⋅ = 3.1 ( 1− 0.69) ISNS
Page 13 and 14: A standard 1MΩ, 1% tolerance resis
Page 15 and 16: 900mV V BOP 750mV ∆V BOP V BOP,AV
Page 17 and 18: at which the converter is expected
Page 19: i chg + Voltage loop compensation i
Page 23 and 24: Voltage Loop Compensation procedure
Page 25 and 26: 1 1 f P0 = ≅ Cz ⋅Cp 2π ⋅ R 2
Page 27 and 28: • Option 2: At the expense of cur
Page 29 and 30: to IC COM pin. However, in reality,
Page 31 and 32: 4.3 Pin ISNS Current sensing is alw

Application Note AN-1150 - International Rectifier

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