Application Note AN-1150 - International Rectifier

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G G VA VA 4.7V ⋅ 0.005 = = 0.0023 2 ⋅5.1V = −52.7dB This is the required attenuation in H 1 (s).H 2 (s) at 2xf AC frequency. H 1 (s), given by V REF /V OUT, is next calculated: 5V H1 = = 0.013 = −37. 7dB 385V The required attenuation from H 2 (s) alone at 2x47Hz is then given by: G VA − H = 15dB 1 − Since the error amplifier pole will be set at a much higher frequency than 2xf AC (and consequently C z >> C p ), the error amplifier transfer function at 2xf AC can be approximated to: H 2 ( s ) g ≅ m ⋅( 1+ sR Since C Z has already been determined, only R gm needs to be calculated: sC H 2 ( j2π ⋅ f AC ) = GVA − H 1 = −15dB = 0.177 R gm = ⎛ G ⎜ ⎝ VA − H g m 1 2 Z gm C Z ⎞ ⎛ 1 ⎟ − ⎜ ⎠ ⎝ 2π ⋅ 2 ⋅ f Substituting f AC =47Hz, g m =49µS, C Z =0.56µF yields R gm = 2 kΩ The location of the zero in the compensation scheme can now be estimated: f z = 1/(2*π*R gm .C z ) = 1/(2*π*2kohm*0.56µF) = 142Hz The location of the pole in the power stage transfer function (assuming a resistive load) is: f PS = 1/(2*π*C OUT *R L /2) = 1/[2*π*330uF*(385V*385V/350W)/2] = 2.3Hz Since the location of zero is more than a decade away from that of the pole, it is likely that this compensation scheme may result in low phase margin. This is discussed more in “Phase Margin Discussion” in step 4. Step 3: Choose Cp based on high-frequency pole location The pole frequency should be chosen higher than the cross over frequency and significantly lower than the switching frequency in order to attenuate switching noise and switching frequency ripple in the output capacitor: typical value is 1/6 to 1/10 of the switching frequency. Choosing 1/6xf SW (=0.166*66kHz=11kHz) for this converter: ) AC ⋅C Z 2 ⎞ ⎟ ⎠ www.irf.com AN-1150 24
1 1 f P0 = ≅ Cz ⋅Cp 2π ⋅ R 2π ⋅ Rgm ⋅Cp gm Cz + Cp C = 1 = 7. nF p 2 ⋅ 2kΩ ⋅ 66kHz ⋅ 0.166 32 π Step 4: Estimate bandwidth & phase margin The voltage loop response for 85VAC and 264VAC is plotted at full output power condition of 350W in Fig.12. At 85VAC/350W the cross-over frequency is 5Hz and phase margin is about 27°. At 264VAC/350W the cross-over frequency is 16Hz and phase margin is about 15°. This was anticipated considering the wide separation between the zero and the pole locations. In this converter, due to the low phase margin, the response to a load step can be oscillatory and may not be acceptable in some applications. At lighter load conditions, the phase margin will drop even further. However, there will be fast transient response. In the end the trade-off between transient response and phase margin should be considered. 90 60 30 0 Gain 85VAC Uncompensated Gain 85VAC Compensated EA Gain Phase 85VAC Uncompensated Phase 85VAC Compensated EA Phase 90 60 30 0 Gain (dB) -30 -60 -90 -120 -150 -30 -60 -90 -120 -150 Phase (deg) -180 -180 0.01 90 0.1 1 10 100 1000 10000 100000 90 f (Hz) Gain 264VAC Uncompensated 60 Gain 264VAC Compensated 60 EA Gain 30 EA Phase Phase 264VAC Uncompensated 30 Phase 264VAC Compensated 0 0 Gain (dB) -30 -60 -90 -120 -150 -30 -60 -90 -120 -150 Phase (deg) -180 -180 0.01 0.1 1 10 100 1000 10000 100000 f (Hz) Fig.12: Overall Loop Gain at 85/264VAC & 350W (fast loop + low phase margin) www.irf.com AN-1150 25
Page 1 and 2: Application Note AN-1150 Power Fact
Page 3 and 4: • VFB - provides DC bus voltage s
Page 5 and 6: one of the comparator misbehaves, t
Page 7 and 8: 3.2 Power Circuit Design AC Line Br
Page 9 and 10: High Frequency Input Capacitor (C I
Page 11 and 12: V 4.7V ⋅ = 3.1 ( 1− 0.69) ISNS
Page 13 and 14: A standard 1MΩ, 1% tolerance resis
Page 15 and 16: 900mV V BOP 750mV ∆V BOP V BOP,AV
Page 17 and 18: at which the converter is expected
Page 19 and 20: i chg + Voltage loop compensation i
Page 21 and 22: Output voltage sensor Resistor-Divi
Page 23: Voltage Loop Compensation procedure
Page 27 and 28: • Option 2: At the expense of cur
Page 29 and 30: to IC COM pin. However, in reality,
Page 31 and 32: 4.3 Pin ISNS Current sensing is alw

Application Note AN-1150 - International Rectifier

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