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Application Note AN-1150 - International Rectifier

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comparator is decoupled from the averaging circuit thus enabling instantaneous<br />

cycle-by-cycle protection for peak current limitation.<br />

5. V CC UVLO<br />

In the event that the voltage at the V CC pin should drop below that of the VCC<br />

UVLO turn-off threshold, V CC(UVLO) the IC is pushed into the UVLO mode, the gate<br />

drive is terminated, and the turn on threshold, V CC, ON must again be exceeded in<br />

order to re start the process. In the UVLO mode, the current consumption is less<br />

than 75uA.<br />

3. PFC Converter Design Procedure<br />

3.1 PFC Converter Specifications<br />

AC Input Voltage Range<br />

Input Line Frequency<br />

Nominal DC Output Voltage<br />

Maximum Output Power<br />

Power Factor<br />

85-264VAC<br />

47-63Hz<br />

385V<br />

350W<br />

0.99 @ 115VAC/350W<br />

0.99 @ 230VAC/350W<br />

Minimum Output Holdup Time 25ms @ V OUT,MIN =285V<br />

Maximum Soft Start Time<br />

60msec<br />

Table 1: Design Specifications for PFC Converter<br />

www.irf.com <strong>AN</strong>-<strong>1150</strong><br />

6

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