MAX9272 28-Bit GMSL Deserializer for Coax or STP Cable

MAX9272
28-Bit GMSL Deserializer for Coax or STP Cable
R L/2
R L /2
V IN+ +
_
+
V IN-
_
IN+
V ID(P)
IN- _
C IN C IN
V ID(P) = | V IN+ - V IN- |
V CMR = (V IN+ + V IN- )/2
PCLKOUT
DOUT_
NOTE: PCLKOUT PROGRAMMED FOR RISING LATCH EDGE.
Figure 2. Test Circuit for Differential Input Measurement
Figure 3. Worst-Case Pattern Output
PCLKOUT
t T
V OH MIN
t HIGH
V OL MAX
t LOW
Figure 4. Parallel Clock Output High and Low Times
PROTOCOL
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
t SU;STA t LOW
t SP
t HIGH
1/f SCL
SCL
t BUF
t HD;STA
t r t f
t SU;DAT t HD;DAT t VD;DAT t VD;ACK t SU;STO
SDA
Figure 5. I 2 C Timing Parameters
16