CS2013-final-report

Body of Knowledge coverage
KA Knowledge Unit Topics Covered Hours
AR
Introductory Material and
Performance
Technology trends, measuring CPU performance,
Amdahl’s law and averaging performance metrics
3
AR Instruction Set Architecture Components of instruction sets, understanding
instruction sets from an implementation perspective,
RISC and CISC and example instruction sets
AR Computer Arithmetic Ripple carry, carry lookahead, and other adder designs,
ALU and Shifters, floating-point arithmetic and floatingpoint
hardware design
AR Datapath and Control Single-cycle and multi-cycle datapaths, control of
datapaths and implementing control finite-state
machines
AR Pipelined Datapaths and Control Basic pipelined datapath and control, data dependences,
data hazards, bypassing, code scheduling, branch
hazards, delayed branches, branch prediction
AR Memory Hierarchies Caches (direct mapped, fully associative, set
associative), main memories, memory hierarchy
performance metrics and their use, virtual memory,
address translation, TLBs
AR Input and Output Common I/O device types and characteristics, memory
mapped I/O, DMA, program-controlled I/O, polling,
interrupts, networks
AR Multiprocessors Introduction to multiprocessors, cache coherence
problem
3
6
4
8
9
3
3
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