Xilinx UG002 Virtex-II Platform FPGA User Guide

Product Obsolete/Under ObsolescenceRBF957 Flip-Chip BGA Package (1.27 mm Pitch) ......................................................... 421Flip-Chip Packages .......................................................................................................... 422Advantages of Flip-Chip Technology ....................................................................... 422Thermal Data..................................................................................................................... 423Thermal Considerations ........................................................................................... 423Thermal Management Options ................................................................................. 424Printed Circuit Board Considerations .......................................................................... 425Layout Considerations ............................................................................................. 425V CC Decoupling ....................................................................................................... 425Board Routability Guidelines........................................................................................ 430Board-Level BGA Routing Challenges ...................................................................... 430Board Routing Strategy ............................................................................................ 431Power Consumption ........................................................................................................ 452CLB Logic Power ..................................................................................................... 452Block SelectRAM Power ........................................................................................... 455Digital Clock Management Power ............................................................................ 456Non-Registered Multiplier Power ............................................................................. 456Registered Multiplier Power ..................................................................................... 457Input/Output Power ................................................................................................ 457Results ..................................................................................................................... 458IBIS Models....................................................................................................................... 460Using IBIS Models .................................................................................................... 460IBIS Generation ........................................................................................................ 460Advantages of IBIS ................................................................................................... 460IBIS File Structure .................................................................................................... 461IBIS I/V and dV/dt Curves ...................................................................................... 461Ramp and dV/dt Curves .......................................................................................... 462IBIS Simulations ....................................................................................................... 462IBIS Simulators ......................................................................................................... 464Xilinx IBIS Advantages ............................................................................................. 464IBIS Reference Web Site ............................................................................................ 464BSDL and Boundary Scan Models................................................................................ 465BSDL Files ................................................................................................................ 465Appendix A: BitGen and PROMGen Switches and OptionsUsing BitGen..................................................................................................................... 467BitGen Syntax .......................................................................................................... 468BitGen Files .............................................................................................................. 468BitGen Options ......................................................................................................... 469Using PROMGen.............................................................................................................. 475PROMGen Syntax .................................................................................................... 476PROMGen Files ........................................................................................................ 476PROMGen Options .................................................................................................. 477Examples ................................................................................................................. 479Appendix B: Platform Flash Family PROMsPROM Package Specifications....................................................................................... 481FS48 Package Specification ....................................................................................... 48212 www.xilinx.com UG002 (v2.2) 5 November 20071-800-255-7778 Virtex-II Platform FPGA User Guide