SoC Encounter for Designers II - Integrated Systems Laboratory

1 OverviewUnlike other exercises in the VLSI lectures, the back-end design flow requires you to learn how touse a commercial Electronic Design Automation (EDA) tool, in our case CADENCE SOC ENCOUNTERfrom Cadence Design Systems. These exercises are therefore called ’Trainings’ and will teach youthe basics of CADENCE SOC ENCOUNTER so that you can use it for your semester projects.There will be three trainings:• Training 1Floorplanning, placement, clock tree synthesis, optimization, routing and timing analysis withCADENCE SOC ENCOUNTER .• Training 2Determining power consumption, IR drop analysis.• Training 3Tape-out preparation, performing Design Rule Check (DRC) and Layout Versus Schematic(LVS) on your final database.Students who plan to work on an ASIC semester project should make sure to visit all three trainings.1.1 About the StyleWe will try to use a number of different styles to identify different types of actions. These are summarizedbelow:Student Task: Parts of the text that have a gray background, like the current paragraph, indicatesteps required to complete the exercise.Actions that require you to select a specific menu fill be shown like the following:menu→sub-menu→sub-sub-menuWhenever there is an option or a tab that can be found in the current view/menu we will use a BUTTONto indicate such an option.Throughout the exercise you will be asked to enter certain commands using the commandline 1 . Thefollowing is an example of the linux command line.sh >command to be entered on the linux command lineWhereas some of the commands will be entered on the command line of the CADENCE SOC EN-COUNTER tool such as:enc >this command is an encounter command1There are many reasons for using a commandline. Some functionality can not not be accessed through GUI commands,and in some cases, using the commandline will be much faster. Most importantly, things you enter on the commandlinecan be converted into a script and executed repeatedly2