User Manual MV1-D1312(I) CameraLink®Series - Machine Vision

5 Hardware Interface5.4 Trigger5.4.1 Trigger ModesThe following sections show the timing diagram for the trigger modes. The signal ExSyncdenotes the trigger signal that is provided either by the interface trigger or the I/O trigger (seeSection 4.6). The other signals are explained in Table 5.4. For an active high trigger signal, theimage acquisition begins with the rising edge of the trigger signal. The image is read out afterthe pre-configured exposure time. After the readout, the sensor returns to the reset state andthe camera waits for a new trigger pulse (see Fig. 5.7).The data is output on the rising edge of the pixel clock, the handshaking signals FRAME_VALID(FVAL) and LINE_VALID (LVAL) mask valid image information. The signal SHUTTER in Fig. 5.7indicates the active integration phase of the sensor and is shown for clarity only.2 + - : 5 ; +5 0 7 6 6 - 4. H = A 6 E A- N F I K H A6 E A. 8 ) + 2 4 - E A F = K I A E A F = K I A E A F = K I A 8 ) . E H I J E A = I J E A, 8 ) , ) 6 )Figure 5.7: Trigger timing diagram for camera controlled exposure5.4.2 Trigger DelayThe total delay between the trigger edge and the camera exposure consists of the delay in theframe grabber and the camera (Fig. 5.8). Usually, the delay in the frame grabber is relativelylarge to avoid accidental triggers caused by voltage spikes (see Fig. 5.9)..50