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<strong>MPC</strong>-WORKSHOP JULI 2012 Fig. 11: Comparison of the total current consumption. In Fig. 11 a simulation of the worst case corner (process corner “slow”, temperature 150 °C) is performed at an input voltage of
ACKNOWLEDGEMENT The work in this paper was sponsored by the Robert Bosch GmbH. Thanks to T. Rosahl and F. <strong>Sie</strong>vers for the efficient cooperation and the constructive support. REFERENCES [1] R. C. Jaeger, “Comments on ‘An optimized output stage for MOS integrated circuits’,” IEEE J . Solid-state Circuits, vol. SC-IO, no. 3, pp. 185-186, June 1975. [2] Li, N.C.; Haviland, G.L.; Tuszynski, A.A.; , "CMOS tapered buffer," Solid-State Circuits, IEEE Journal of , vol.25, no.4, pp.1005-1008, Aug 1990 [3] Ivan Sutherland, Bob Sproull, and David Harris. “Logical Effort.” Morgan Kaufmann, Publishers, 1999. [4] F. Stettner, “Half-Bridge Powerstage for Integrated Synchronous Buck Converter.” Diploma Thesis, Texas Instruments Deutschland, Technical University Munich, May 2009. 24 GATE DRIVER DESIGN FOR FAST SWITCHING DC-DC CONVERTERS Juergen Wittmann received his Dipl.-Ing. Degree from the Technical University of Munich, Germany, in 2006. From 2006 until 2011, he was with the Mixed-Signal Automotive business unit of Texas Instruments, in Freising, Germany, as an Analog Design Engineer. In February 2011, he joined the Robert Bosch Center for Power Electronics at Reutlingen University as a research assistant. He is working towards his Ph.D. degree in the area of power- and microelectronics. Tobias Funk received the B. Eng. from the University of Applied Science Esslingen, Germany in 2011. From 2011 until 2012, he is a student at the master’s program “Power Electronics and Microelectronic” at the Robert Bosch Center for Power Electronics. Bernhard Wicht received the Dipl.-Ing. Degree from the Technical University Dresden, Germany in 1996 and the Ph.D. degree from the Technical University Munich, Germany, in 2002. From 1996 to 1998, he was with MAZ Hamburg GmbH as a designer of analog ASICs for optical measurement systems. In 1998, he joined the Institute for Technical Electronics of the Technical University Munich, Germany, as a Research Assistant, where he was working on sense amplifiers until 2002 in cooperation with Infineon Technologies. From 2003 until August 2010, he was with the Mixed Signal Automotive business unit of Texas Instruments, in Freising, Germany, responsible for the development of automotive smart power ICs. In September 2010 he became a professor for integrated circuits at Reutlingen University, Robert Bosch Center for Power Electronics. His research interests include IC design with focus on power management, gate drivers, energy efficiency, low-power, ESD, EMC. He invented 12 patents with several more patents pending. Prof. Wicht is member of IEEE and VDE. He also serves as a member of the Technical Program Committee of the European Solid-State Circuits Conference (ESSCIRC).
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Seite 3 und 4: Tagungsband zum Workshop der Multip
Seite 5 und 6: II. THE CYBER-PHYSICAL SYSTEM CHALL
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Seite 9 und 10: ception buffers. This allows higher
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Seite 19 und 20: Um die Messzellen zu betreiben, mus
Seite 21 und 22: Fig. 2: Principle of a two-stage ga
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Seite 25: Fig. 9: Signals VP and VN of the 6-
Seite 29 und 30: Figure 3: Block diagram showing the
Seite 31 und 32: Figure 6: Rectifier with cross coup
Seite 33 und 34: Table 3: Load modulation circuit. S
Seite 35 und 36: REFERENCES [1] W. Jeon, J. Melngail
Seite 37 und 38: Abbildung 2: Floating Gate. Den gr
Seite 39 und 40: tung zwischen den Generatorpolynome
Seite 41 und 42: Tabelle 1: Parameter dreier verschi
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Seite 47 und 48: Figure 5: Average distribution of t
Seite 49 und 50: REFERENCES [1] Agilent, „DC Power
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Seite 53 und 54: .NOP {255:8 0:5 0:5 0:4 0:10 0:16 0
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Seite 57 und 58: Abbildung 2: Auszug der Signalverkn
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Seite 63 und 64: (a) Schematic-pCell (b) Layout-pCel
Seite 65 und 66: Abbildung 15: Layout Stromspiegel-p
Seite 67: MULTI PROJEKT CHIP GRUPPE Hochschul

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