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Figure 6: Rectifier with cross coupled NMOS transistors.
The power rectifier must be kept in the allowed operational
area by the above circuit. The output of the
rectifier is also used to supply the ESD protection
circuits in the pads, which are MOS diodes connected
to ground on one side and to the output of the power
rectifier on the other side. The input voltages can by
this never be larger than the output of the power rectifier
plus the threshold of the diodes (ca. 0.7 V). So the
output of the power rectifier is the highest voltage in
the circuit.
Clamping of the antenna signals must be hard
enough to protect the circuit against breakdown and
disturbance. It is not expected that the demodulation
works under such overvoltage conditions. In normal
operation the protection circuit must be inactive and
shall not draw any current. The circuit is designed for
a hard clamping, starting at 3.5 V and limiting the
voltage to 3.7 V under normal conditions.
IV. POWER SUPPLY
The power supply unit consists of the rectifiers,
bandgap reference circuits and LDO regulator.
A. Rectifier
The power rectifier shown as block B10 in figure 3
is used to supply the low drop out regulator connected
to it, which in turn is used to drive any external circuitry.
The output is also used for load modulation, so
for short intervals, the output voltage is loaded and
this small interference has to be suppressed by the
LDO as far as possible. A load capacitance at the
external supply helps to bridge these intervals.
The communications chain has its own rectifier,
supplying the bandgap-circuitry, clock recovery circuit,
demodulation and field detection circuit. The
comparator, used for demodulation, is supplied by the
bandgap regulated voltage and by this independent on
range and temperature influences.
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REALIZATION OF AN RFID FRONT END IC FOR ISO 15693
STANDARD IN UMC CMOS 0.18 µM TECHNOLOGY
Figure 7: Curve showing PTAT and CTAT voltages [6].
Figure 8: Band Gap reference (Vref).
Both the rectifiers used are typical full wave bridge
rectifiers which are built by using four cross connected
NMOS transistors as shown in figure 6.
The (W/L) ratio of the rectifier transistors are made
large (800:1 for block B10 in figure 3 and 200:1 for
block B3 in figure 3 respectively) in order to get a
small voltage drop and a good efficiency.
B. Bandgap reference
The purpose of a bandgap voltage reference is to deliver
a fixed output voltage which is almost supply
voltage and temperature independent. As shown in
figure 7 the reference voltage is generated by adding
two voltages, one having a positive and the other a
negative temperature coefficient. When temperature
increases, VBE linearly decreases and Vt (thermal voltage)
linearly increases, which makes the Vref almost
constant. The voltage obtained is first order independent
of temperature. Figure 8 shows the type of band
gap reference circuit used here. The reference voltage
Vref is given by the following equation,
Vt
⋅ln(
N)
Vref
= VBE
+ ⋅ R2
(3)
R1
where Vt is the thermal voltage which is 26 mV at
300 °K and N denotes the number of BJTs in parallel
which is 8 in this design. Now if we consider a current
Ix is flowing through the BJT X. The same current Ix is
also flowing through N transistors connected in parallel,
identical to X.