datasheet (3).pdf - EEWeb

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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 FIGURE 22-1: ADC MODULE BLOCK DIAGRAM FOR dsPIC33FJ32MC304, dsPIC33FJ64MC204/804 AND dsPIC33FJ128MC204/804 DEVICES CH0 CH1 (2) CH2 (2) CH3 (2) AN1 VREFL AN0 AN3 AN6 VREFL AN0 AN8 CHANNEL SCAN CH0SA AN1 AN4 AN7 VREFL AN2 AN5 AN8 VREFL CSCNA CH0SB CH0NA CH0NB CH123SA CH123SB CH123NA CH123NB CH123SA CH123SB CH123NA CH123NB CH123SA CH123SB CH123NA CH123NB + - + Alternate Input Selection - + - + - SAR ADC DS70291E-page 274 © 2011 Microchip Technology Inc. S/H0 S/H1 S/H2 S/H3 Note 1: VREF+, VREF- inputs can be multiplexed with other analog inputs. 2: Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation. AVDD VREF- AVSS (1) VREF+ (1) VCFG VREFH VREFL ADC1BUF0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 FIGURE 22-2: ADC1 MODULE BLOCK DIAGRAM FOR dsPIC33FJ32MC302, dsPIC33FJ64MC202/802 AND dsPIC33FJ128MC202/802 DEVICES CH0 CH1 (2) CH2 (2) CH3 (2) CHANNEL SCAN CH0SA AN1 VREFL AN0 AN3 VREFL AN1 AN4 VREFL AN2 AN5 VREFL AN0 AN5 CSCNA CH0SB CH0NA CH0NB CH123SA CH123SB CH123NA CH123NB CH123SA CH123SB CH123NA CH123NB CH123SA CH123SB CH123NA CH123NB + - + Alternate Input Selection - + - + - SAR ADC © 2011 Microchip Technology Inc. DS70291E-page 275 S/H0 S/H1 S/H2 S/H3 Note 1: VREF+, VREF- inputs can be multiplexed with other analog inputs. 2: Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation. AVDD VREF- AVSS (1) VREF+ (1) VCFG VREFH VREFL ADC1BUF0
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© 2011 Microchip Technology Inc. D
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