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DS70291E-page 330 © 2011 Microchip Technology Inc. TABLE 28-5: CODE FLASH SECURITY SEGMENT SIZES FOR 128 KB DEVICES CONFIG BITS BSS=x11 0K BSS=x10 1K BSS=x01 4K BSS=x00 8K SSS = x11 0K VS = 256 IW GS = 43776 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 768 IW GS = 43008 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 3840 IW GS = 39936 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 7936 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h 0157FEh 0157FEh 0157FEh 0157FEh SSS = x10 4K VS = 256 IW SS = 3840 IW GS = 39936 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00ABFEh VS = 256 IW BS = 768 IW SS = 3072 IW GS = 39936 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00ABFEh VS = 256 IW BS = 3840 IW GS = 39936 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00ABFEh VS = 256 IW BS = 7936 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00ABFEh 0157FEh 0157FEh 0157FEh 0157FEh SSS = x01 8K VS = 256 IW SS = 7936 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 768 IW SS = 7168 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 3840 IW SS = 4096 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h VS = 256 IW BS = 7936 IW GS = 35840 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h 00FFFEh 010000h 0157FEh 0157FEh 0157FEh 0157FEh SSS = x00 16K VS = 256 IW SS = 16128 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h VS = 256 IW BS = 768 IW SS = 15360 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h VS = 256 IW BS = 3840 IW SS = 12288 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h VS = 256 IW BS = 7936 IW SS = 8192 IW 000000h 0001FEh 000200h 0007FEh 000800h 001FFEh 002000h 003FFEh 004000h 007FFEh 008000h GS = 27648 IW 00FFFEh 010000h GS = 27648 IW 00FFFEh 010000h GS = 27648 IW 00FFFEh 010000h GS = 27648 IW 00FFFEh 010000h 0157FEh 0157FEh 0157FEh 0157FEh dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 29.0 INSTRUCTION SET SUMMARY Note: This data sheet summarizes the features of the dsPIC33FJ32MC302/ 304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/X04 family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the “dsPIC33F/PIC24H Family Reference Manual”. Please see the Microchip web site (www.microchip.com) for the latest dsPIC33F/PIC24H Family Reference Manual sections. The dsPIC33F instruction set is identical to that of the dsPIC30F. Most instructions are a single program memory word (24 bits). Only three instructions require two program memory locations. Each single-word instruction is a 24-bit word, divided into an 8-bit opcode, which specifies the instruction type and one or more operands, which further specify the operation of the instruction. The instruction set is highly orthogonal and is grouped into five basic categories: • Word or byte-oriented operations • Bit-oriented operations • Literal operations • DSP operations • Control operations Table 29-1 shows the general symbols used in describing the instructions. The dsPIC33F instruction set summary in Table 29-2 lists all the instructions, along with the status flags affected by each instruction. Most word or byte-oriented W register instructions (including barrel shift instructions) have three operands: • The first source operand, which is typically a register ‘Wb’ without any address modifier • The second source operand, which is typically a register ‘Ws’ with or without an address modifier • The destination of the result, which is typically a register ‘Wd’ with or without an address modifier However, word or byte-oriented file register instructions have two operands: • The file register specified by the value ‘f’ • The destination, which could be either the file register ‘f’ or the W0 register, which is denoted as ‘WREG’ Most bit-oriented instructions (including simple rotate/ shift instructions) have two operands: • The W register (with or without an address modifier) or file register (specified by the value of ‘Ws’ or ‘f’) • The bit in the W register or file register (specified by a literal value or indirectly by the contents of register ‘Wb’) The literal instructions that involve data movement can use some of the following operands: • A literal value to be loaded into a W register or file register (specified by ‘k’) • The W register or file register where the literal value is to be loaded (specified by ‘Wb’ or ‘f’) However, literal instructions that involve arithmetic or logical operations use some of the following operands: • The first source operand, which is a register ‘Wb’ without any address modifier • The second source operand, which is a literal value • The destination of the result (only if not the same as the first source operand), which is typically a register ‘Wd’ with or without an address modifier The MAC class of DSP instructions can use some of the following operands: • The accumulator (A or B) to be used (required operand) • The W registers to be used as the two operands • The X and Y address space prefetch operations • The X and Y address space prefetch destinations • The accumulator write back destination The other DSP instructions do not involve any multiplication and can include: • The accumulator to be used (required) • The source or destination operand (designated as Wso or Wdo, respectively) with or without an address modifier • The amount of shift specified by a W register ‘Wn’ or a literal value The control instructions can use some of the following operands: • A program memory address • The mode of the table read and table write instructions © 2011 Microchip Technology Inc. DS70291E-page 331
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