datasheet (3).pdf - EEWeb

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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 REGISTER 27-1: PMCON: PARALLEL PORT CONTROL REGISTER R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PMPEN — PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN bit 15 bit 8 R/W-0 R/W-0 R/W-0 (1) U-0 R/W-0 (1) R/W-0 R/W-0 R/W-0 CSF1 CSF0 ALP — CS1P BEP WRSP RDSP bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 PMPEN: Parallel Master Port Enable bit 1 = PMP enabled 0 = PMP disabled, no off-chip access performed bit 14 Unimplemented: Read as ‘0’ bit 13 PSIDL: Stop in Idle Mode bit 1 = Discontinue module operation when device enters Idle mode 0 = Continue module operation in Idle mode bit 12-11 ADRMUX1:ADRMUX0: Address/Data Multiplexing Selection bits (1) 11 =Reserved 10 =All 16 bits of address are multiplexed on PMD pins 01 =Lower 8 bits of address are multiplexed on PMD pins, upper 3 bits are multiplexed on PMA 00 =Address and data appear on separate pins bit 10 PTBEEN: Byte Enable Port Enable bit (16-bit Master mode) 1 = PMBE port enabled 0 = PMBE port disabled bit 9 PTWREN: Write Enable Strobe Port Enable bit 1 = PMWR/PMENB port enabled 0 = PMWR/PMENB port disabled bit 8 PTRDEN: Read/Write Strobe Port Enable bit 1 = PMRD/PMWR port enabled 0 = PMRD/PMWR port disabled bit 7-6 CSF1:CSF0: Chip Select Function bits 11 = Reserved 10 = PMCS1 functions as chip select 0x = PMCS1 functions as address bit 14 bit 5 ALP: Address Latch Polarity bit (2) 1 = Active-high (PMALL and PMALH) 0 = Active-low (PMALL and PMALH) bit 4 Unimplemented: Read as ‘0’ bit 3 CS1P: Chip Select 1 Polarity bit (2) 1 = Active-high (PMCS1/PMCS1) 0 = Active-low (PMCS1/PMCS1) Note 1: 28-pin devices do not have PMA. 2: These bits have no effect when their corresponding pins are used as address lines. DS70291E-page 314 © 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 REGISTER 27-1: PMCON: PARALLEL PORT CONTROL REGISTER (CONTINUED) bit 2 BEP: Byte Enable Polarity bit 1 = Byte enable active-high (PMBE) 0 = Byte enable active-low (PMBE) bit 1 WRSP: Write Strobe Polarity bit For Slave modes and Master mode 2 (PMMODE = 00,01,10): 1 = Write strobe active-high (PMWR) 0 = Write strobe active-low (PMWR) For Master mode 1 (PMMODE = 11): 1 = Enable strobe active-high (PMENB) 0 = Enable strobe active-low (PMENB) bit 0 RDSP: Read Strobe Polarity bit For Slave modes and Master mode 2 (PMMODE = 00,01,10): 1 = Read strobe active-high (PMRD) 0 = Read strobe active-low (PMRD) For Master mode 1 (PMMODE = 11): 1 = Read/write strobe active-high (PMRD/PMWR) 0 = Read/write strobe active-low (PMRD/PMWR) Note 1: 28-pin devices do not have PMA. 2: These bits have no effect when their corresponding pins are used as address lines. © 2011 Microchip Technology Inc. DS70291E-page 315
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