datasheet (3).pdf - EEWeb

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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 TABLE A-2: MAJOR SECTION UPDATES (CONTINUED) Section Name Update Description Section 11.0 “I/O Ports” Removed Table 11-1 and added reference to pin diagrams for I/O pin availability and functionality. Section 18.0 “Serial Peripheral Interface (SPI)” Section 20.0 “Universal Asynchronous Receiver Transmitter (UART)” Section 21.0 “Enhanced CAN (ECAN) Module” Section 22.0 “10-bit/12-bit Analogto-Digital Converter (ADC1)” Section 23.0 “Audio Digital-to- Analog Converter (DAC)” Added paragraph on ADPCFG register default values to Section 11.3 “Configuring Analog Port Pins”. Added Note box regarding PPS functionality with input mapping to Section 11.6.2.1 “Input Mapping”. Added Note 2 and 3 to the SPIxCON1 register (see Register 18-2). Updated the Notes in the UxMode register (see Register 20-1). Updated the UTXINV bit settings in the UxSTA register and added Note 1 (see Register 20-2). Changed bit 11 in the ECAN Control Register 1 (CiCTRL1) to Reserved (see Register 21-1). Replaced the ADC1 Module Block Diagrams with new diagrams (see Figure 22-1 and Figure 22-2). Updated bit values for ADCS and added Notes 1 and 2 to the ADC1 Control Register 3 (AD1CON3) (see Register 22-3). Added Note 2 to the ADC1 Input Scan Select Register Low (AD1CSSL) (see Register 22-7). Added Note 2 to the ADC1 Port Configuration Register Low (AD1PCFGL) (see Register 22-8). Updated the midpoint voltage in the last sentence of the first paragraph. Updated the voltage swing values in the last sentence of the last paragraph in Section 23.3 “DAC Output Format”. Section 24.0 “Comparator Module” Updated the Comparator Voltage Reference Block Diagram (see Figure 24-2). Section 25.0 “Real-Time Clock and Calendar (RTCC)” Updated the minimum positive adjust value for CAL in the RTCC Calibration and Configuration (RCFGCAL) Register (see Register 25-1). Section 28.0 “Special Features” Added Note 1 to the Device Configuration Register Map (see Table 28-1). Updated Note 1 in the dsPIC33F Configuration Bits Description (see Table 28-2). DS70291E-page 420 © 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 TABLE A-2: MAJOR SECTION UPDATES (CONTINUED) Section Name Update Description Section 31.0 “Electrical Characteristics” Updated Typical values for Thermal Packaging Characteristics (see Table 31-3). Updated Min and Max values for parameter DC12 (RAM Data Retention Voltage) and added Note 4 (see Table 31-4). Updated Power-Down Current Max values for parameters DC60b and DC60c (see Table 31-7). Updated Characteristics for I/O Pin Input Specifications (see Table 31-9). Updated Program Memory values for parameters 136, 137 and 138 (renamed to 136a, 137a and 138a), added parameters 136b, 137b and 138b, and added Note 2 (see Table 31-12). Added parameter OS42 (GM) to the External Clock Timing Requirements (see Table 31-16). Updated Watchdog Timer Time-out Period parameter SY20 (see Table 31-21). Removed VOMIN, renamed VOMAX to VO, and updated the Min and Max values in the Audio DAC Module Specifications (see Table 31-44). © 2011 Microchip Technology Inc. DS70291E-page 421
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