datasheet (3).pdf - EEWeb

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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 IPC2 (Interrupt Priority Control 2) ............................. 116 IPC3 (Interrupt Priority Control 3) ............................. 117 IPC4 (Interrupt Priority Control 4) ............................. 118 IPC5 (Interrupt Priority Control 5) ............................. 119 IPC6 (Interrupt Priority Control 6) ............................. 120 IPC7 (Interrupt Priority Control 7) ............................. 121 IPC8 (Interrupt Priority Control 8) ............................. 122 IPC9 (Interrupt Priority Control 9) ............................. 123 NVMCON (Flash Memory Control) ............................. 79 NVMKEY (Nonvolatile Memory Key) .......................... 80 OCxCON (Output Compare x Control) ..................... 207 OSCCON (Oscillator Control) ................................... 149 OSCTUN (FRC Oscillator Tuning) ............................ 153 P1DC3 (PWM Duty Cycle 3)..................................... 221 PLLFBD (PLL Feedback Divisor).............................. 152 PMD1 (Peripheral Module Disable Control Register 1)... 159 PMD2 (Peripheral Module Disable Control Register 2)... 161 PMD3 (Peripheral Module Disable Control Register 3)... 162 PWMxCON1 (PWM Control 1).................................. 215 PWMxCON2 (PWM Control 2).................................. 216 PxDC1 (PWM Duty Cycle 1) ..................................... 221 PxDC2 (PWM Duty Cycle 2) ..................................... 221 PxDTCON1 (Dead-Time Control 1) .......................... 217 PxDTCON2 (Dead-Time Control 2) .......................... 218 PxFLTACON (Fault A Control).................................. 219 PxOVDCON (Override Control) ................................ 220 PxSECMP (Special Event Compare)........................ 214 PxTCON (PWM Time Base Control). 212, 289, 290, 291 PxTMR (PWM Timer Count Value)........................... 213 PxTPER (PWM Time Base Period) .......................... 213 QEICON (QEI Control).............................................. 224 RCON (Reset Control) ................................................ 84 SPIxCON1 (SPIx Control 1)...................................... 229 SPIxCON2 (SPIx Control 2)...................................... 231 SPIxSTAT (SPIx Status and Control) ....................... 228 SR (CPU Status)................................................... 29, 96 T1CON (Timer1 Control)........................................... 196 TCxCON (Input Capture x Control)........................... 204 TxCON (Type B Time Base Control) ........................ 200 TyCON (Type C Time Base Control) ........................ 201 UxMODE (UARTx Mode).......................................... 242 UxSTA (UARTx Status and Control)......................... 244 Reset Illegal Opcode ....................................................... 83, 90 Trap Conflict.......................................................... 89, 90 Uninitialized W Register........................................ 83, 90 Reset Sequence.................................................................. 91 Resets ................................................................................. 83 S Serial Peripheral Interface (SPI) ....................................... 227 Software Reset Instruction (SWR) ...................................... 89 Software Simulator (MPLAB SIM)..................................... 341 Software Stack Pointer, Frame Pointer CALLL Stack Frame.................................................... 67 Special Features of the CPU............................................. 321 SPI Module SPI1 Register Map...................................................... 54 Symbols Used in Opcode Descriptions............................. 332 System Control Register Map......................................................... 65, 66 T Temperature and Voltage Specifications AC ..................................................................... 354, 394 Timer1............................................................................... 195 Timer2/3............................................................................ 197 Timing Characteristics CLKO and I/O ........................................................... 357 Timing Diagrams 10-bit ADC Conversion (CHPS = 01, SIMSAM = 0, ASAM = 0, SSRC = 000)......................... 383 10-bit ADC Conversion (CHPS = 01, SIMSAM = 0, ASAM = 1, SSRC = 111, SAMC = 00001)....................................... 383 10-bit ADC Conversion (CHPS = 01, SIMSAM = 0, ASAM = 1, SSRC = 111, SAMC = 00001) .............................................................. 383 12-bit ADC Conversion (ASAM = 0, SSRC = 000) 381 Brown-out Situations................................................... 89 ECAN I/O.................................................................. 377 External Clock........................................................... 355 I2Cx Bus Data (Master Mode) .................................. 373 I2Cx Bus Data (Slave Mode) .................................... 375 I2Cx Bus Start/Stop Bits (Master Mode)................... 373 I2Cx Bus Start/Stop Bits (Slave Mode)..................... 375 Input Capture (CAPx) ............................................... 363 Motor Control PWM .................................................. 365 Motor Control PWM Fault ......................................... 365 OC/PWM................................................................... 364 Output Compare (OCx)............................................. 363 QEA/QEB Input ........................................................ 366 QEI Module Index Pulse........................................... 367 Reset, Watchdog Timer, Oscillator Start-up Timer and Power-up Timer ......................................... 358 SPIx Master Mode (CKE = 0) ................................... 368 SPIx Master Mode (CKE = 1) ................................... 369 SPIx Slave Mode (CKE = 0) ..................................... 370 SPIx Slave Mode (CKE = 1) ..................................... 371 Timer1, 2, 3 External Clock ...................................... 360 TimerQ (QEI Module) External Clock ....................... 362 Timing Requirements ADC Conversion (10-bit mode)................................. 398 ADC Conversion (12-bit Mode)................................. 397 CLKO and I/O ........................................................... 357 External Clock........................................................... 355 Input Capture............................................................ 363 SPIx Master Mode (CKE = 0) ................................... 395 SPIx Module Master Mode (CKE = 1) ...................... 395 SPIx Module Slave Mode (CKE = 0) ........................ 396 SPIx Module Slave Mode (CKE = 1) ........................ 396 Timing Specifications 10-bit ADC Conversion Requirements...................... 384 12-bit ADC Conversion Requirements...................... 382 CAN I/O Requirements............................................. 377 I2Cx Bus Data Requirements (Master Mode)........... 374 I2Cx Bus Data Requirements (Slave Mode)............. 376 Motor Control PWM Requirements........................... 365 Output Compare Requirements................................ 363 PLL Clock ......................................................... 356, 394 QEI External Clock Requirements............................ 362 QEI Index Pulse Requirements ................................ 367 Quadrature Decoder Requirements.......................... 366 Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer and Brown-out Reset Requirements ................................................... 359 Simple OC/PWM Mode Requirements ..................... 364 SPIx Master Mode (CKE = 0) Requirements............ 368 SPIx Master Mode (CKE = 1) Requirements............ 369 SPIx Slave Mode (CKE = 0) Requirements.............. 370 SPIx Slave Mode (CKE = 1) Requirements.............. 372 Timer1 External Clock Requirements....................... 360 DS70291E-page 430 © 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 Timer2 External Clock Requirements ....................... 361 Timer3 External Clock Requirements ....................... 361 U UART Module UART1 Register Map.................................................. 53 Universal Asynchronous Receiver Transmitter (UART).... 241 Using the RCON Status Bits ............................................... 90 V Voltage Regulator (On-Chip) ............................................ 325 W Watchdog Time-out Reset (WDTR) .................................... 89 Watchdog Timer (WDT) ............................................ 321, 326 Programming Considerations ................................... 326 WWW Address.................................................................. 423 WWW, On-Line Support ..................................................... 13 © 2011 Microchip Technology Inc. DS70291E-page 431
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