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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 NOTES: DS70291E-page 38 © 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 4.0 MEMORY ORGANIZATION Note: This data sheet summarizes the features of the dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/X04 family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 4. “Program Memory” (DS70203) of the “dsPIC33F/ PIC24H Family Reference Manual”, which is available from the Microchip web site (www.microchip.com). The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/ X04 and dsPIC33FJ128MCX02/X04 architecture features separate program and data memory spaces and buses. This architecture also allows the direct access of program memory from the data space during code execution. 4.1 Program Address Space The program address memory space of the dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/X04 devices is 4M instructions. The space is addressable by a 24-bit value derived either from the 23-bit Program Counter (PC) during program execution, or from table operation or data space remapping as described in Section 4.6 “Interfacing Program and Data Memory Spaces”. User application access to the program memory space is restricted to the lower half of the address range (0x000000 to 0x7FFFFF). The exception is the use of TBLRD/TBLWT operations, which use TBLPAG to permit access to the Configuration bits and Device ID sections of the configuration memory space. The memory map for the dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/ X04 devices is shown in Figure 4-1. FIGURE 4-1: PROGRAM MEMORY MAP FOR dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/ X04 AND dsPIC33FJ128MCX02/X04 DEVICES Configuration Memory Space User Memory Space dsPIC33FJ32MC302/304 GOTO Instruction Reset Address Interrupt Vector Table Reserved Alternate Vector Table User Program Flash Memory (11264 instructions) Unimplemented (Read ‘0’s) Reserved 0x000000 0x000002 0x000004 0x0000FE 0x000100 0x000104 0x0001FE 0x000200 0x7FFFFE 0x800000 0xF7FFFE Device Configuration Registers Device Configuration Registers Device Configuration Registers 0xF80000 0xF80017 0xF80018 Reserved DEVID (2) Note: Memory areas are not shown to scale. dsPIC33FJ64MCX02/X04 GOTO Instruction Reset Address Interrupt Vector Table Reserved Alternate Vector Table User Program Flash Memory (22016 instructions) Unimplemented (Read ‘0’s) Reserved Reserved DEVID (2) dsPIC33FJ128MCX02/X04 GOTO Instruction Reset Address Interrupt Vector Table Reserved Alternate Vector Table User Program Flash Memory (44032 instructions) Unimplemented (Read ‘0’s) Reserved Reserved DEVID (2) Reserved Reserved Reserved 0x0057FE 0x005800 0x00ABFE 0x00AC00 0x0157FE 0x015800 0xFEFFFE 0xFF0000 0xFF0002 0xFFFFFE © 2011 Microchip Technology Inc. DS70291E-page 39
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