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DS70291E-page 54 © 2011 Microchip Technology Inc. TABLE 4-15: SPI1 REGISTER MAP SFR Name SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SPI1STAT 0240 SPIEN — SPISIDL — — — — — — SPIROV — — — — SPITBF SPIRBF 0000 SPI1CON1 0242 — — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE PPRE 0000 SPI1CON2 0244 FRMEN SPIFSD FRMPOL — — — — — — — — — — — FRMDLY — 0000 SPI1BUF 0248 SPI1 Transmit and Receive Buffer Register 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. TABLE 4-16: SPI2 REGISTER MAP SFR Name SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SPI2STAT 0260 SPIEN — SPISIDL — — — — — — SPIROV — — — — SPITBF SPIRBF 0000 SPI2CON1 0262 — — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE PPRE 0000 SPI2CON2 0264 FRMEN SPIFSD FRMPOL — — — — — — — — — — — FRMDLY — 0000 SPI2BUF 0268 SPI2 Transmit and Receive Buffer Register 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. TABLE 4-17: ADC1 REGISTER MAP FOR dsPIC33FJ64MC202/802, dsPIC33FJ128MC202/802 AND dsPIC33FJ32MC302 File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ADC1BUF0 0300 ADC Data Buffer 0 xxxx AD1CON1 0320 ADON — ADSIDL ADDMABM — AD12B FORM SSRC — SIMSAM ASAM SAMP DONE 0000 AD1CON2 0322 VCFG — — CSCNA CHPS BUFS — SMPI BUFM ALTS 0000 AD1CON3 0324 ADRC — — SAMC ADCS 0000 AD1CHS123 0326 — — — — — CH123NB CH123SB — — — — — CH123NA CH123SA 0000 AD1CHS0 0328 CH0NB — — CH0SB CH0NA — — CH0SA 0000 AD1PCFGL 032C — — — — — — — — — — PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 0000 AD1CSSL 0330 — — — — — — — — — — CSS5 CSS4 CSS3 CSS2 CSS1 CSS0 0000 AD1CON4 0332 — — — — — — — — — — — — — DMABL 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. All Resets All Resets All Resets dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
© 2011 Microchip Technology Inc. DS70291E-page 55 TABLE 4-18: ADC1 REGISTER MAP FOR dsPIC33FJ64MC204/804, dsPIC33FJ128MC204/804 AND dsPIC33FJ32MC304 File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ADC1BUF0 0300 ADC Data Buffer 0 xxxx AD1CON1 0320 ADON — ADSIDL ADDMABM — AD12B FORM SSRC — SIMSAM ASAM SAMP DONE 0000 AD1CON2 0322 VCFG — — CSCNA CHPS BUFS — SMPI BUFM ALTS 0000 AD1CON3 0324 ADRC — — SAMC ADCS 0000 AD1CHS123 0326 — — — — — CH123NB CH123SB — — — — — CH123NA CH123SA 0000 AD1CHS0 0328 CH0NB — — CH0SB CH0NA — — CH0SA 0000 AD1PCFGL 032C — — — — — — — PCFG8 PCFG7 PCFG6 PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 0000 AD1CSSL 0330 — — — — — — — CSS8 CSS7 CSS6 CSS5 CSS4 CSS3 CSS2 CSS1 CSS0 0000 AD1CON4 0332 — — — — — — — — — — — — — DMABL 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. TABLE 4-19: DAC1 REGISTER MAP FOR dsPIC33FJ128MC804 AND dsPIC33FJ64MC804 SFR Name SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DAC1CON 03F0 DACEN — DACSIDL AMPON — — — FORM — DACFDIV 0000 DAC1STAT 03F2 LOEN — LMVOEN — — LITYPE LFULL LEMPTY ROEN — RMVOEN — — RITYPE RFULL REMPTY 0000 DAC1DFLT 03F4 DAC1DFLT 0000 DAC1RDAT 03F6 DAC1RDAT 0000 DAC1LDAT 03F8 DAC1LDAT 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. All Resets All Resets dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
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dsPIC33FJ32MC302/304, dsPIC33FJ64MC
Page 3 and 4: dsPIC33FJ32MC302/304, dsPIC33FJ64MC
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