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RealView Compilation Tools - ARM Information Center

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Compiler-specific Features<br />

4.7.46 <strong>ARM</strong>v6 SIMD intrinsics, summary descriptions, byte lanes, side-effects<br />

Table 4-16<br />

Intrinsic<br />

Summary description<br />

Returns<br />

Byte lanes<br />

Operands<br />

Side-effects<br />

__qadd16 2 x 16-bit addition, saturated to range -2 15 ≤ x ≤ 2 15 - 1 int16x2 int16x2,<br />

int16x2<br />

__qadd8 4 x 8-bit addition, saturated to range -2 7 ≤ x ≤ 2 7 - 1 int8x4 int8x4,<br />

int8x4<br />

None<br />

None<br />

__qasx<br />

Exchange halfwords of second operand, add high<br />

halfwords, subtract low halfwords, saturating in each case<br />

int16x2<br />

int16x2,<br />

int16x2<br />

None<br />

__qsax<br />

Exchange halfwords of second operand, subtract high<br />

halfwords, add low halfwords, saturating in each case<br />

int16x2<br />

int16x2,<br />

int16x2<br />

None<br />

__qsub16 2 x 16-bit subtraction with saturation int16x2 int16x2,<br />

int16x2<br />

__qsub8 4 x 8-bit subtraction with saturation int8x4 int8x4,<br />

int8x4<br />

__sadd16 2 x 16-bit signed addition. int16x2 int16x2,<br />

int16x2<br />

__sadd8 4 x 8-bit signed addition int8x4 int8x4,<br />

int8x4<br />

None<br />

None<br />

APSR.GE bits<br />

APSR.GE bits<br />

__sasx<br />

Exchange halfwords of second operand, add high<br />

halfwords, subtract low halfwords<br />

int16x2<br />

int16x2,<br />

int16x2<br />

APSR.GE bits<br />

__sel<br />

Select each byte of the result from either the first operand<br />

or the second operand, according to the values of the GE<br />

bits. For each result byte, if the corresponding GE bit is<br />

set, the byte from the first operand is selected, otherwise<br />

the byte from the second operand is selected. Because of<br />

the way that int16x2 operations set two (duplicate) GE bits<br />

per value, the __sel intrinsic works equally well on<br />

(u)int16x2 and (u)int8x4 data.<br />

uint8x4<br />

uint8x4,<br />

uint8x4<br />

None<br />

__shadd16 2x16-bit signed addition, halving the results int16x2 int16x2,<br />

int16x2<br />

__shadd8 4x8-bit signed addition, halving the results int8x4 int8x4,<br />

int8x4<br />

None<br />

None<br />

4-112 Copyright © 2007-2010 <strong>ARM</strong>. All rights reserved. <strong>ARM</strong> DUI 0348C<br />

Non-Confidential,<br />

ID101213

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