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Compiler-specific Features
4.7.86 __uasx intrinsic
This intrinsic inserts a UASX instruction into the instruction stream generated by the
compiler. It enables you to exchange the two halfwords of the second operand, add the
high halfwords and subtract the low halfwords.
The GE bits in the APSR are set according to the results.
unsigned int __uasx(unsigned int val1, unsigned int val2)
Where:
val1
val2
holds the first operand for the subtraction in the low halfword, and the
first operand for the addition in the high halfword
holds the second operand for the subtraction in the high halfword and the
second operand for the addition in the low halfword.
The __uasx intrinsic returns:
• the subtraction of the high halfword in the second operand from the low halfword
in the first operand, in the low halfword of the return value
• the addition of the high halfword in the first operand and the low halfword in the
second operand, in the high halfword of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on
the results of the operation. If res is the return value, then:
• if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
• if res[31:16] ≥ 0x10000 then APSR.GE[3:2] = 11 else 00.
Example:
unsigned int exchange_add_subtract(unsigned int val1, unsigned int val2)
{
unsigned int res;
}
res = __uasx(val1,val2); /* res[15:0] = val1[15:0] + val2[31:16]
res[31:16] = val1[31:16] + val2[15:0]
*/
return res;
See also
• ARMv6 SIMD intrinsics on page 4-109
• Instruction summary on page 4-2 in the Assembler Guide
• Parallel add and subtract on page 4-99 in the Assembler Guide.
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