RealView Compilation Tools - ARM Information Center

Compiler-specific Features
4.7.48 ARMv6 SIMD instruction intrinsics and APSR GE flags
Table 4-18
Intrinsic APSR.GE flag action APSR.GE operation
__sel Reads GE flags if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else val2[7:0]
if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else val2[15:8]
if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else val2[23:16]
if APSR.GE[3] == 1 then res[31:24] = val1[31:24] else val2[31:24]
__sadd16 Sets or clears GE flags if sum1 ≥ 0 then APSR.GE[1:0] = 11 else 00
if sum2 ≥ 0 then APSR.GE[3:2] = 11 else 00
__sadd8 Sets or clears GE flags if sum1 ≥ 0 then APSR.GE[0] = 1 else 0
if sum2 ≥ 0 then APSR.GE[1] = 1 else 0
if sum3 ≥ 0 then APSR.GE[2] = 1 else 0
if sum4 ≥ 0 then APSR.GE[3] = 1 else 0
__sasx Sets or clears GE flags if diff ≥ 0 then APSR.GE[1:0] = 11 else 00
if sum ≥ 0 then APSR.GE[3:2] = 11 else 00
__ssax Sets or clears GE flags if sum ≥ 0 then APSR.GE[1:0] = 11 else 00
if diff ≥ 0 then APSR.GE[3:2] = 11 else 00
__ssub16 Sets or clears GE flags if diff1 ≥ 0 then APSR.GE[1:0] = 11 else 00
if diff2 ≥ 0 then APSR.GE[3:2] = 11 else 00
__ssub8 Sets or clears GE flags if diff1 ≥ 0 then APSR.GE[0] = 1 else 0
if diff2 ≥ 0 then APSR.GE[1] = 1 else 0
if diff3 ≥ 0 then APSR.GE[2] = 1 else 0
if diff4 ≥ 0 then APSR.GE[3] = 1 else 0
__uadd16 Sets or clears GE flags if sum1 ≥ 0x10000 then APSR.GE[1:0] = 11 else 00
if sum2 ≥ 0x10000 then APSR.GE[3:2] = 11 else 00
__uadd8 Sets or clears GE flags if sum1 ≥ 0x100 then APSR.GE[0] = 1 else 0
if sum2 ≥ 0x100 then APSR.GE[1] = 1 else 0
if sum3 ≥ 0x100 then APSR.GE[2] = 1 else 0
if sum4 ≥ 0x100 then APSR.GE[3] = 1 else 0
__uasx Sets or clears GE flags if diff ≥ 0 then APSR.GE[1:0] = 11 else 00
if sum ≥ 0x10000 then APSR.GE[3:2] = 11 else 00
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