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Compiler-specific Features
4.7.73 __smlsldx intrinsic
This intrinsic inserts an SMLSLDX instruction into the instruction stream generated by the
compiler. It enables you to exchange the halfwords of the second operand, perform two
16-bit multiplications, adding the difference of the products to a 64-bit accumulate
operand. Overflow cannot occur during the multiplications or the subtraction. Overflow
can occur as a result of the 64-bit addition, and this overflow is not detected. Instead,
the result wraps round to modulo 64 .
unsigned long long__smlsldx(unsigned int val1, unsigned int val2, unsigned long
long val3)
Where:
val1
val2
val3
holds the first halfword operands for each multiplication
holds the second halfword operands for each multiplication
holds the accumulate value.
The __smlsld intrinsic returns the difference of the product of each multiplication,
added to the accumulate value.
Example:
unsigned long long dual_multiply_diff_prods(unsigned int val1, unsigned int
val2, unsigned long long val3)
{
unsigned int res;
}
res = __smlsld(val1,val2,val3); /* p1 = val1[15:0] × val2[31:16]
p2 = val1[31:16] × val2[15:0]
res[63:0] = p1 - p2 + val3[63:0]
*/
return res;
See also
• ARMv6 SIMD intrinsics on page 4-109
• Instruction summary on page 4-2 in the Assembler Guide
• SMLALD and SMLSLD on page 4-88 in the Assembler Guide.
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