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Compiler-specific Features
4.7.71 __smlsdx intrinsics
This intrinsic inserts an SMLSDX instruction into the instruction stream generated by the
compiler. It enables you to exchange the halfwords in the second operand, then perform
two 16-bit signed multiplications. The difference of the products is added to a 32-bit
accumulate operand. The Q bit is set if the addition overflows. Overflow cannot occur
during the multiplications or the subtraction.
unsigned int__smlsdx(unsigned int val1, unsigned int val2, unsigned int val3)
Where:
val1
val2
val3
holds the first halfword operands for each multiplication
holds the second halfword operands for each multiplication
holds the accumulate value.
The __smlsd intrinsic returns the difference of the product of each multiplication, added
to the accumulate value.
Example:
unsigned int dual_multiply_diff_prods(unsigned int val1, unsigned int val2,
unsigned int val3)
{
unsigned int res;
}
res = __smlsd(val1,val2,val3); /* p1 = val1[15:0] × val2[31:16]
p2 = val1[31:16] × val2[15:0]
res[31:0] = p1 - p2 + val3[31:0]
*/
return res;
See also
• ARMv6 SIMD intrinsics on page 4-109
• Instruction summary on page 4-2 in the Assembler Guide
• SMLAD and SMLSD on page 4-86 in the Assembler Guide.
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