RealView Compilation Tools - ARM Information Center

Compiler-specific Features
4.7.80 __ssub16 intrinsic
This intrinsic inserts an SSUB16 instruction into the instruction stream generated by the
compiler. It enables you to perform two 16-bit signed integer subtractions.
The GE bits in the APSR are set according to the results.
unsigned int __ssub16(unsigned int val1, unsigned int val2)
Where:
val1
val2
holds the first operands of each addition in the low and the high halfwords
holds the second operands for each addition in the low and the high
halfwords.
The __ssub16 intrinsic returns:
• the subtraction of the low halfword in the second operand from the low halfword
in the first operand, in the low halfword of the return value
• the subtraction of the high halfword in the second operand from the high halfword
in the first operand, in the high halfword of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on
the results of the operation. If res is the return value, then:
• if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
• if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00.
Example:
unsigned int subtract halfwords(unsigned int val1, unsigned int val2)
{
unsigned int res;
}
res = __ssub16(val1,val2); /* res[15:0] = val1[15:0] - val2[15:0]
res[31:16] = val1[31:16] - val2[31:16]
*/
return res;
See also
• ARMv6 SIMD intrinsics on page 4-109
• __sel intrinsic on page 4-134
• Instruction summary on page 4-2 in the Assembler Guide
• Parallel add and subtract on page 4-99 in the Assembler Guide.
4-156 Copyright © 2007-2010 ARM. All rights reserved. ARM DUI 0348C
Non-Confidential,
ID101213