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Compiler-specific Features
4.7.56 __sadd16 intrinsic
This instrinsic inserts an SADD16 instruction into the instruction stream generated by the
compiler. It enables you to perform two 16-bit signed integer additions. The GE bits in
the APSR are set according to the results of the additions.
unsigned int __sadd16(unsigned int val1, unsigned int val2)
Where:
val1
val2
holds the first two 16-bit summands
holds the second two 16-bit summands.
The __sadd16 intrinsic returns:
• the addition of the low halfwords in the low halfword of the return value
• the addition of the high halfwords in the high halfword of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on
the results of the operation. If res is the return value, then:
• if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
• if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00.
Example:
unsigned int add_halfwords(unsigned int val1, unsigned int val2)
{
unsigned int res;
}
res = __sadd16(val1,val2); /* res[15:0] = val1[15:0] + val2[15:0]
res[31:16] = val1[31:16] + val2[31:16]
*/
return res;
See also
• ARMv6 SIMD intrinsics on page 4-109
• __sel intrinsic on page 4-134
• Instruction summary on page 4-2 in the Assembler Guide
• Saturating instructions on page 4-93 in the Assembler Guide
• Parallel add and subtract on page 4-99 in the Assembler Guide.
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