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Compiler-specific Features 4.7.102 __usat16 intrinsic This intrinsic inserts a USAT16 instruction into the instruction stream generated by the compiler. It enables you to saturate two signed 16-bit values to a selected unsigned range. The Q flag is set if either operation saturates. unsigned int __usat16(unsigned int val1, /* constant */ unsigned int val2) Where: val1 val2 holds the two 16-bit values that are to be saturated specifies the bit position for saturation, and must be an integral constant expression. The __usat16 intrinsic returns the saturation of the two signed 16-bit values, as non-negative values. Example: unsigned int saturate_halfwords(unsigned int val1, unsigned int val2) { unsigned int res; } res = __usax(val1,val2); /* Saturate halfwords in val1 to the unsigned range specified by the bit position in val2 */ return res; See also • ARMv6 SIMD intrinsics on page 4-109 • Instruction summary on page 4-2 in the Assembler Guide • SSAT16 and USAT16 on page 4-104 in the Assembler Guide. 4-182 Copyright © 2007-2010 ARM. All rights reserved. ARM DUI 0348C Non-Confidential, ID101213
Compiler-specific Features 4.7.103 __usub16 intrinsic This intrinsic inserts a USUB16 instruction into the instruction stream generated by the compiler. It enables you to perform two 16-bit unsigned integer subtractions. The GE bits in the APSR are set according to the results. unsigned int __usub16(unsigned int val1, unsigned int val2) Where: val1 val2 holds the first two halfword operands holds the second two halfword operands. The __usub16 intrinsic returns: • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. If res is the return value, then: • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00 • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00. Example: unsigned int subtract_halfwords(unsigned int val1, unsigned int val2) { unsigned int res; } res = __usub16(val1,val2); /* res[15:0] = val1[15:0] - val2[15:0] res[31:16] = val1[31:16] - val2[31:16] */ See also • ARMv6 SIMD intrinsics on page 4-109 • Instruction summary on page 4-2 in the Assembler Guide • Parallel add and subtract on page 4-99 in the Assembler Guide. ARM DUI 0348C Copyright © 2007-2010 ARM. All rights reserved. 4-183 ID101213 Non-Confidential,
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Contents RealView Compilation Tools
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Preface This preface introduces the
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Preface Appendix A Via File Syntax
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Preface Other publications The foll
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Chapter 1 Introduction This chapter
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Introduction 1.2 Source language mo
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Introduction 1.3 Language extension
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Introduction • Compiling a C sour
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Chapter 2 Compiler Command-line Opt
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Compiler Command-line Options 2.1.2
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Compiler Command-line Options Each
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Appendix E Using NEON Support This
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