uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

CHAPTER 8 WATCHDOG TIMER8.3 Watchdog Timer Control RegistersThe following two registers are used to control the watchdog timer.• Watchdog timer clock selection register (WDCS)• Watchdog timer mode register (WDTM)(1) Watchdog timer clock selection register (WDCS)This register sets the watchdog timer count clock.WDCS is set with an 8-bit memory manipulation instruction.RESET input clears WDCS to 00H.Figure 8-2. Format of Watchdog Timer Clock Selection RegisterSymbol 7 6 5 4 3 2 1 0 Address After reset R/WWDCS0 0 0 0 0 WDCS2 WDCS1 WDCS0FF42H 00H R/WWDCS2WDCS1WDCS0Count clock selectionInterval timeAt fX = 10.0 MHzoperation NoteAt fX = 5.0 MHzoperationAt fX = 10.0 MHzoperation NoteAt fX = 5.0 MHzoperation0002 4 /fX625 kHz313 kHz2 11 /fX205 µ s410 µ s0102 6 /fX156 kHz78.1 kHz2 13 /fX819 µ s1.64 ms1002 8 /fX39.1 kHz19.5 kHz2 15 /fX3.28 ms6.55 ms1102 10 /fX9.77 kHz4.88 kHz2 17 /fX13.1 ms26.2 msOther than aboveSetting prohibitedNote Expanded-specification products only.RemarkfX: System clock oscillation frequencyUser’s Manual U14801EJ3V1UD 111