uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

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CHAPTER 9 SERIAL INTERFACE 20Figure 9-11. 3-Wire Serial I/O Mode Timing (6/7)(x) Master operation (when DAP20 = 1, CKP20 = 1, SSE20 = 0)SIO20WriteSCK201 2 3 4 5 6 7 8SO20Note DO7 DO6 DO5 DO4 DO3 DO2 DO1DO0SI20DI7 DI6 DI5 DI4 DI3 DI2 DI1DI0INTCSI20Note The value of the last bit previously output is output.(xi) Slave operation (when DAP20 = 1, CKP20 = 1, SSE20 = 0)SIO20WriteSCK201 2 3 4 5 6 7 8SI20DI7 DI6 DI5 DI4 DI3 DI2 DI1DI0SO20Note DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0INTCSI20Note The value of the last bit previously output is output.148User’s Manual U14801EJ3V1<strong>UD</strong>
CHAPTER 9 SERIAL INTERFACE 20Figure 9-11. 3-Wire Serial I/O Mode Timing (7/7)(xii) Slave operation (when DAP20 = 1, CKP20 = 1, SSE20 = 1)SS20SIO20WriteSCK201 2 3 4 5 6 7 8SI20DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0SO20Hi-ZNote 1DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Note 2Hi-ZINTCSI20Notes 1. The value of the last bit previously output is output.2. DO0 is output until SS20 rises.When SS20 is high, SO20 is in a high-impedance state.(3) Transfer startSerial transfer is started by setting transfer data to the transmit shift register (TXS20/SIO20) when thefollowing two conditions are satisfied.• Serial operation mode register 20 (CSIM20) bit 7 (CSIE20) = 1• Internal serial clock is stopped or SCK20 is high after 8-bit serial transfer.Caution If CSIE20 is set to "1" after data is written to TXS20/SIO20, transfer does not start.The termination of 8-bit transfer stops the serial transfer automatically and generates the interrupt requestsignal (INTCSI20).User’s Manual U14801EJ3V1<strong>UD</strong> 149
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User’s ManualµPD789074 Subseries
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NOTES FOR CMOS DEVICES1VOLTAGE APPL
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Regional InformationSome informatio
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INTRODUCTIONReadersPurposeOrganizat
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Documents for Flash Memory WritingP
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CHAPTER 11 STANDBY FUNCTION .......
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LIST OF FIGURES (1/3)Figure No. Tit
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LIST OF FIGURES (3/3)Figure No. Tit
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LIST OF TABLES (2/2)Table No. Title
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CHAPTER 1 GENERAL1.2 Features• RO
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CHAPTER 1 GENERAL1.6 Pin Configurat
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CHAPTER 1 GENERALThe major function
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CHAPTER 1 GENERAL1.8 Block DiagramT
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CHAPTER 1 GENERAL1.10 Differences B
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CHAPTER 2 PIN FUNCTIONS(2) Non-port
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CHAPTER 2 PIN FUNCTIONS(h) RxD20, T
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CHAPTER 2 PIN FUNCTIONS2.3 Pin I/O
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CHAPTER 3 CPU ARCHITECTURE3.1 Memor
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CHAPTER 3 CPU ARCHITECTUREFigure 3-
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CHAPTER 3 CPU ARCHITECTURE3.1.1 Int
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CHAPTER 3 CPU ARCHITECTURE(a) Inter
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CHAPTER 3 CPU ARCHITECTURE3.2.2 Gen
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CHAPTER 3 CPU ARCHITECTURETable 3-3
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CHAPTER 3 CPU ARCHITECTURE3.3 Instr
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CHAPTER 3 CPU ARCHITECTURE3.3.3 Tab
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CHAPTER 3 CPU ARCHITECTURE3.4.2 Sho
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CHAPTER 3 CPU ARCHITECTURE3.4.4 Reg
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CHAPTER 3 CPU ARCHITECTURE3.4.6 Bas
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CHAPTER 4 PORT FUNCTIONSTable 4-1.
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CHAPTER 4 PORT FUNCTIONS4.2.2 Port
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CHAPTER 4 PORT FUNCTIONSFigure 4-5.
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CHAPTER 4 PORT FUNCTIONSFigure 4-7.
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CHAPTER 4 PORT FUNCTIONS4.3 Port Fu
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CHAPTER 4 PORT FUNCTIONS(3) Pull-up
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CHAPTER 5 CLOCK GENERATOR5.1 Clock
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CHAPTER 5 CLOCK GENERATOR5.4 System
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CHAPTER 5 CLOCK GENERATORFigure 5-4
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CHAPTER 5 CLOCK GENERATOR5.6 Changi
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Figure 6-1. Block Diagram of 16-Bit
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CHAPTER 6 16-BIT TIMER 906.3 Contro
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CHAPTER 6 16-BIT TIMER 90(2) Buzzer
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CHAPTER 6 16-BIT TIMER 906.4 Operat
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CHAPTER 6 16-BIT TIMER 906.4.2 Oper
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CHAPTER 6 16-BIT TIMER 906.4.4 16-b
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CHAPTER 6 16-BIT TIMER 906.5 Notes
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CHAPTER 15 ELECTRICAL SPECIFICATION
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CHAPTER 18 RECOMMENDED SOLDERING CO
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APPENDIX A DEVELOPMENT TOOLSThe fol
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APPENDIX A DEVELOPMENT TOOLSA.1 Sof
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APPENDIX A DEVELOPMENT TOOLSA.4 Fla
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APPENDIX B NOTES ON TARGET SYSTEM D
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APPENDIX C REGISTER INDEXC.1 Regist
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APPENDIX C REGISTER INDEXC.2 Regist
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APPENDIX D REVISION HISTORYThe foll
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uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

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