uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

CHAPTER 11 STANDBY FUNCTION11.2 Operation of Standby Function11.2.1 HALT mode(1) HALT modeHALT mode is set by executing the HALT instruction.The operation statuses in HALT mode are shown in the following table.Table 11-1. Operation Statuses in HALT ModeItemSystem clock generatorCPUPort (output latch)16-bit timer 908-bit timer/event counter 80Watchdog timerSerial interface 20External interruptHALT Mode Operation StatusSystem clock oscillation enabledClock supply to CPU stoppedOperation disabledRemains in the state existing before the selection of HALT modeOperation enabledOperation enabledOperation enabledOperation enabledOperation enabled NoteNote Maskable interrupt that is not masked(2) Releasing HALT modeHALT mode can be released by the following three sources.(a) Releasing by unmasked interrupt requestHALT mode is released by an unmasked interrupt request. In this case, if interrupt requestacknowledgment is enabled, vectored interrupt servicing is performed. If interrupt acknowledgment isdisabled, the instruction at the next address is executed.Figure 11-2. Releasing HALT Mode by InterruptHALTinstructionWaitStandbyrelease signalOperatingmodeHALT modeWaitOperating modeClockOscillationRemarks 1. The broken lines indicate the case where the interrupt request that has released standbymode is acknowledged.2. The wait time is as follows.• When vectored interrupt servicing is performed: 9 to 10 clocks• When vectored interrupt servicing is not performed: 1 to 2 clocksUser’s Manual U14801EJ3V1UD 167