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CHAPTER 3 CPU ARCHITECTUREFigure 3-4. Memory Map (µPD78F9076)FFFFHSpecial function registers256 × 8 bitsFF00HFEFFHInternal high-speed RAM256 × 8 bitsFE00HFDFFHData memory spaceReserved3FFFH4000H3FFFHProgram areaProgram memoryspace0000HInternal flash memory16,384 × 8 bits0080H007FH0040H003FH0018H0017H0000HCALLT table areaProgram areaVector table area40User’s Manual U14801EJ3V1UD
CHAPTER 3 CPU ARCHITECTURE3.1.1 Internal program memory spaceThe internal program memory space stores programs and table data. This space is usually addressed by theprogram counter (PC).Products in the µPD789074 Subseries provide the following internal ROM (or flash memory) containing thefollowing capacities.Table 3-1. Internal ROM CapacityPart NumberInternal ROMµPD789071µPD789072µPD789074Mask ROMStructureCapacity2,048 × 8 bits4,096 × 8 bits8,192 × 8 bitsµPD78F9076 Flash memory 16,384 × 8 bitsThe following areas are allocated to the internal program memory space.(1) Vector table areaThe 24-byte area of addresses 0000H to 0017H is reserved as a vector table area. This area storesprogram start addresses to be used when branching by RESET input or interrupt request generation. Of a16-bit program address, the lower 8 bits are stored in an even address, and the higher 8 bits are stored in anodd address.Table 3-2. Vector TableVector Table Address Interrupt Request Vector Table Address Interrupt Request0000H RESET input 000CH INTSR20/INTCSI200004H INTWDT 000EH INTST200006H INTP0 0014H INTTM800008H INTP1 0016H INTTM90000AHINTP2(2) CALLT instruction table areaThe subroutine entry address of a 1-byte call instruction (CALLT) can be stored in the 64-byte area ofaddresses 0040H to 007FH.3.1.2 Internal data memory (internal high-speed RAM) spaceThe µPD789074 Subseries provides 256-byte internal high-speed RAM.The internal high-speed RAM can also be used as a stack memory.3.1.3 Special function register (SFR) areaSpecial function registers (SFRs) of on-chip peripheral hardware are allocated to the area of FF00H to FFFFH(see Table 3-3).User’s Manual U14801EJ3V1UD 41
Page 1 and 2: User’s ManualµPD789074 Subseries
Page 3 and 4: NOTES FOR CMOS DEVICES1VOLTAGE APPL
Page 5 and 6: Regional InformationSome informatio
Page 7 and 8: INTRODUCTIONReadersPurposeOrganizat
Page 9: Documents for Flash Memory WritingP
Page 13 and 14: CHAPTER 11 STANDBY FUNCTION .......
Page 15 and 16: LIST OF FIGURES (1/3)Figure No. Tit
Page 17 and 18: LIST OF FIGURES (3/3)Figure No. Tit
Page 19 and 20: LIST OF TABLES (2/2)Table No. Title
Page 21 and 22: CHAPTER 1 GENERAL1.2 Features• RO
Page 23 and 24: CHAPTER 1 GENERAL1.6 Pin Configurat
Page 25 and 26: CHAPTER 1 GENERALThe major function
Page 27 and 28: CHAPTER 1 GENERAL1.8 Block DiagramT
Page 29 and 30: CHAPTER 1 GENERAL1.10 Differences B
Page 31 and 32: CHAPTER 2 PIN FUNCTIONS(2) Non-port
Page 33 and 34: CHAPTER 2 PIN FUNCTIONS(h) RxD20, T
Page 35 and 36: CHAPTER 2 PIN FUNCTIONS2.3 Pin I/O
Page 37 and 38: CHAPTER 3 CPU ARCHITECTURE3.1 Memor
Page 39: CHAPTER 3 CPU ARCHITECTUREFigure 3-
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Page 47 and 48: CHAPTER 3 CPU ARCHITECTURE(a) Inter
Page 49 and 50: CHAPTER 3 CPU ARCHITECTURE3.2.2 Gen
Page 51 and 52: CHAPTER 3 CPU ARCHITECTURETable 3-3
Page 53 and 54: CHAPTER 3 CPU ARCHITECTURE3.3 Instr
Page 55 and 56: CHAPTER 3 CPU ARCHITECTURE3.3.3 Tab
Page 57 and 58: CHAPTER 3 CPU ARCHITECTURE3.4.2 Sho
Page 59 and 60: CHAPTER 3 CPU ARCHITECTURE3.4.4 Reg
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Page 63 and 64: CHAPTER 4 PORT FUNCTIONSTable 4-1.
Page 65 and 66: CHAPTER 4 PORT FUNCTIONS4.2.2 Port
Page 67 and 68: CHAPTER 4 PORT FUNCTIONSFigure 4-5.
Page 69 and 70: CHAPTER 4 PORT FUNCTIONSFigure 4-7.
Page 71 and 72: CHAPTER 4 PORT FUNCTIONS4.3 Port Fu
Page 73 and 74: CHAPTER 4 PORT FUNCTIONS(3) Pull-up
Page 75 and 76: CHAPTER 5 CLOCK GENERATOR5.1 Clock
Page 77 and 78: CHAPTER 5 CLOCK GENERATOR5.4 System
Page 79 and 80: CHAPTER 5 CLOCK GENERATORFigure 5-4
Page 81 and 82: CHAPTER 5 CLOCK GENERATOR5.6 Changi
Page 83 and 84: Figure 6-1. Block Diagram of 16-Bit
Page 85 and 86: CHAPTER 6 16-BIT TIMER 906.3 Contro
Page 87 and 88: CHAPTER 6 16-BIT TIMER 90(2) Buzzer
Page 89 and 90: CHAPTER 6 16-BIT TIMER 906.4 Operat
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CHAPTER 6 16-BIT TIMER 906.4.2 Oper
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CHAPTER 6 16-BIT TIMER 906.4.4 16-b
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CHAPTER 6 16-BIT TIMER 906.5 Notes
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CHAPTER 7 8-BIT TIMER/EVENT COUNTER
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CHAPTER 8 WATCHDOG TIMER8.1 Watchdo
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CHAPTER 9 SERIAL INTERFACE 209.1 Fu
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Figure 9-2. Block Diagram of Baud R
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CHAPTER 9 SERIAL INTERFACE 209.3 Co
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CHAPTER 9 SERIAL INTERFACE 20(1) Op
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CHAPTER 9 SERIAL INTERFACE 20(4) Ba
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CHAPTER 9 SERIAL INTERFACE 20(b) Ge
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CHAPTER 9 SERIAL INTERFACE 209.4.2
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(d) Ba
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20(c) Tr
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CHAPTER 9 SERIAL INTERFACE 20(e) Re
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CHAPTER 9 SERIAL INTERFACE 20(3) Ca
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20Figure
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CHAPTER 10 INTERRUPT FUNCTIONSTable
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CHAPTER 10 INTERRUPT FUNCTIONS10.3
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CHAPTER 10 INTERRUPT FUNCTIONS(2) I
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CHAPTER 10 INTERRUPT FUNCTIONS(4) P
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CHAPTER 10 INTERRUPT FUNCTIONSFigur
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CHAPTER 11 STANDBY FUNCTION11.1 Sta
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CHAPTER 11 STANDBY FUNCTION11.2 Ope
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CHAPTER 11 STANDBY FUNCTION11.2.2 S
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CHAPTER 12 RESET FUNCTIONThe follow
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CHAPTER 12 RESET FUNCTIONTable 12-1
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CHAPTER 13 µPD78F907613.1 Flash Me
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CHAPTER 13 µPD78F9076Figure 13-3.
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CHAPTER 13 µPD78F907613.1.3 On-boa
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CHAPTER 13 µPD78F9076When the rese
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CHAPTER 13 µPD78F9076Figure 13-9.
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CHAPTER 14 INSTRUCTION SET OVERVIEW
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CHAPTER 15 ELECTRICAL SPECIFICATION
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CHAPTER 18 RECOMMENDED SOLDERING CO
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APPENDIX A DEVELOPMENT TOOLSThe fol
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APPENDIX A DEVELOPMENT TOOLSA.1 Sof
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APPENDIX A DEVELOPMENT TOOLSA.4 Fla
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APPENDIX B NOTES ON TARGET SYSTEM D
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APPENDIX C REGISTER INDEXC.1 Regist
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APPENDIX C REGISTER INDEXC.2 Regist
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APPENDIX D REVISION HISTORYThe foll
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uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

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