uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

CHAPTER 9 SERIAL INTERFACE 20Table 9-5. Example of Relationship Between System Clock and Baud RateBaud RatefX = 10.0 MHz Note fX = 5.0 MHz fX = 4.9152 MHz(bps) n BRGC20 Set Value Error (%) n BRGC20 Set Value Error (%) n BRGC20 Set Value Error (%)1,200 − − 1.73 8 70H 1.73 8 70H 02,400 8 70H 7 60H 7 60H4,800 7 60H 6 50H 6 50H9,600 6 50H 5 40H 5 40H19,200 5 40H 4 30H 4 30H38,400 4 30H 3 20H 3 20H76,800 3 20H 2 10H 2 10HNote Expanded-specification products only.Cautions 1. Be sure not to select n = 1 during operation at fx > 2.5 MHz because the resulting baud rateexceeds the rated range.2. Be sure not to select n = 2 during operation at fx > 5.0 MHz because the resulting baud rateexceeds the rated range.(ii) Generation of baud rate transmit/receive clock from external clock input from ASCK20 pinThe transmit/receive clock is generated by dividing the clock input from the ASCK20 pin. The baudrate of the clock generated from the clock input from the ASCK20 pin is estimated by using thefollowing expression.[Baud rate] =fASCK16[bps]fASCK: Frequency of clock input from the ASCK20 pinTable 9-6. Relationship Between ASCK20 Pin Input Frequencyand Baud Rate (When BRGC20 Is Set to 80H)Baud Rate (bps)ASCK20 Pin Input Frequency (kHz)75 1.2150 2.4300 4.8600 9.61,200 19.22,400 38.44,800 76.89,600 153.619,200 307.231,250 500.038,400 614.4132User’s Manual U14801EJ3V1UD