uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

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APPENDIX B NOTES ON TARGET SYSTEM DESIGNFigure B-2. Connection Condition of Target SystemEmulation boardIE-789046-NS-EM1Emulation probeNP-30MCBoard on end of NP-30MC13 mm5 mmGuide pinYQGUIDEConversion adapterYSPACK30BK,NSPACK30BK37 mm20 mm15 mm31 mmTarget systemRemarks 1. NP-30MC is a product of Naito Densei Machida Mfg. Co., Ltd.2. YSPACK30BK, NSPACK30BK, and YQGUIDE are products of TOKYO ELETECH CORPORATION.232User’s Manual U14801EJ3V1<strong>UD</strong>
APPENDIX C REGISTER INDEXC.1 Register Name Index (Alphabetic Order)16-bit capture register 90 (TCP90) .........................................................................................................................8416-bit compare register 90 (CR90) .........................................................................................................................8416-bit timer counter 90 (TM90) ...............................................................................................................................8416-bit timer mode control register 90 (TMC90) .......................................................................................................858-bit compare register 80 (CR80) ...........................................................................................................................988-bit timer counter 80 (TM80) .................................................................................................................................988-bit timer mode control register 80 (TMC80) .........................................................................................................99[A]Asynchronous serial interface mode register 20 (ASIM20)...................................................................................120Asynchronous serial interface status register 20 (ASIS20)...................................................................................122[B]Baud rate generator control register 20 (BRGC20) ..............................................................................................123Buzzer output control register 90 (BZC90) .............................................................................................................87[E]External interrupt mode register 0 (INTM0) ..........................................................................................................156[I]Interrupt mask flag register 0, 1 (MK0, MK1)........................................................................................................155Interrupt request flag register 0, 1 (IF0, IF1).........................................................................................................154[O]Oscillation stabilization time selection register (OSTS).........................................................................................166[P]Port 0 (P0) ............................................................................................................................................................64Port 1 (P1) ............................................................................................................................................................65Port 2 (P2) ............................................................................................................................................................66Port 3 (P3) ............................................................................................................................................................70Port mode register 0 (PM0) ....................................................................................................................................71Port mode register 1 (PM1) ....................................................................................................................................71Port mode register 2 (PM2) ....................................................................................................................................71Port mode register 3 (PM3) ....................................................................................................................................71Processor clock control register (PCC)...................................................................................................................76Pull-up resistor option register 0 (PU0)...................................................................................................................72Pull-up resistor option register B2 (PUB2)..............................................................................................................73[R]Receive buffer register 20 (RXB20)......................................................................................................................118User’s Manual U14801EJ3V1<strong>UD</strong> 233
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User’s ManualµPD789074 Subseries
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NOTES FOR CMOS DEVICES1VOLTAGE APPL
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Regional InformationSome informatio
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INTRODUCTIONReadersPurposeOrganizat
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Documents for Flash Memory WritingP
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CHAPTER 11 STANDBY FUNCTION .......
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LIST OF FIGURES (1/3)Figure No. Tit
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LIST OF FIGURES (3/3)Figure No. Tit
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LIST OF TABLES (2/2)Table No. Title
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CHAPTER 1 GENERAL1.2 Features• RO
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CHAPTER 1 GENERAL1.6 Pin Configurat
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CHAPTER 1 GENERALThe major function
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CHAPTER 1 GENERAL1.8 Block DiagramT
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CHAPTER 1 GENERAL1.10 Differences B
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CHAPTER 2 PIN FUNCTIONS(2) Non-port
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CHAPTER 2 PIN FUNCTIONS(h) RxD20, T
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CHAPTER 2 PIN FUNCTIONS2.3 Pin I/O
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CHAPTER 3 CPU ARCHITECTURE3.1 Memor
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CHAPTER 3 CPU ARCHITECTUREFigure 3-
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CHAPTER 3 CPU ARCHITECTURE3.1.1 Int
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CHAPTER 3 CPU ARCHITECTURE(a) Inter
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CHAPTER 3 CPU ARCHITECTURE3.2.2 Gen
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CHAPTER 3 CPU ARCHITECTURETable 3-3
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CHAPTER 3 CPU ARCHITECTURE3.3 Instr
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CHAPTER 3 CPU ARCHITECTURE3.3.3 Tab
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CHAPTER 3 CPU ARCHITECTURE3.4.2 Sho
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CHAPTER 3 CPU ARCHITECTURE3.4.4 Reg
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CHAPTER 3 CPU ARCHITECTURE3.4.6 Bas
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CHAPTER 4 PORT FUNCTIONSTable 4-1.
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CHAPTER 4 PORT FUNCTIONS4.2.2 Port
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CHAPTER 4 PORT FUNCTIONSFigure 4-5.
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CHAPTER 4 PORT FUNCTIONSFigure 4-7.
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CHAPTER 4 PORT FUNCTIONS4.3 Port Fu
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CHAPTER 4 PORT FUNCTIONS(3) Pull-up
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CHAPTER 5 CLOCK GENERATOR5.1 Clock
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CHAPTER 5 CLOCK GENERATOR5.4 System
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CHAPTER 5 CLOCK GENERATORFigure 5-4
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CHAPTER 5 CLOCK GENERATOR5.6 Changi
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Figure 6-1. Block Diagram of 16-Bit
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CHAPTER 6 16-BIT TIMER 906.3 Contro
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CHAPTER 6 16-BIT TIMER 90(2) Buzzer
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CHAPTER 6 16-BIT TIMER 906.4 Operat
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CHAPTER 6 16-BIT TIMER 906.4.2 Oper
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CHAPTER 6 16-BIT TIMER 906.4.4 16-b
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CHAPTER 6 16-BIT TIMER 906.5 Notes
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CHAPTER 7 8-BIT TIMER/EVENT COUNTER
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CHAPTER 8 WATCHDOG TIMER8.1 Watchdo
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CHAPTER 9 SERIAL INTERFACE 209.1 Fu
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Figure 9-2. Block Diagram of Baud R
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CHAPTER 9 SERIAL INTERFACE 209.3 Co
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CHAPTER 9 SERIAL INTERFACE 20(1) Op
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CHAPTER 9 SERIAL INTERFACE 20(4) Ba
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CHAPTER 9 SERIAL INTERFACE 20(b) Ge
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CHAPTER 9 SERIAL INTERFACE 209.4.2
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(d) Ba
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20(c) Tr
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CHAPTER 9 SERIAL INTERFACE 20(e) Re
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CHAPTER 9 SERIAL INTERFACE 20(3) Ca
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20Figure
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CHAPTER 10 INTERRUPT FUNCTIONSTable
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CHAPTER 10 INTERRUPT FUNCTIONS10.3
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CHAPTER 10 INTERRUPT FUNCTIONS(2) I
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CHAPTER 10 INTERRUPT FUNCTIONS(4) P
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CHAPTER 10 INTERRUPT FUNCTIONSFigur
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CHAPTER 11 STANDBY FUNCTION11.1 Sta
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CHAPTER 11 STANDBY FUNCTION11.2 Ope
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CHAPTER 11 STANDBY FUNCTION11.2.2 S
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CHAPTER 12 RESET FUNCTIONThe follow
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CHAPTER 12 RESET FUNCTIONTable 12-1
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CHAPTER 13 µPD78F907613.1 Flash Me
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CHAPTER 13 µPD78F9076Figure 13-3.
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CHAPTER 13 µPD78F907613.1.3 On-boa
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Page 185 and 186: CHAPTER 14 INSTRUCTION SET OVERVIEW
Page 195 and 196: CHAPTER 15 ELECTRICAL SPECIFICATION
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Page 225 and 226: APPENDIX A DEVELOPMENT TOOLSThe fol
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