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CHAPTER 15 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS)AC Characteristics(1) Basic operation (TA = −40 to +85°C, VDD = 1.8 to 5.5 V)Parameter Symbol Conditions MIN. TYP. MAX. UnitCycle time(Minimum instructionexecution time)TI80 inputfrequencyTI80 input high-/low-level widthTCYfTItTIH, tTILVDD = 4.5 to 5.5 V 0.2 8 µsVDD = 3.0 to 5.5 V 0.33 8 µsVDD = 2.7 to 5.5 V 0.4 8 µsVDD = 1.8 to 5.5 V 1.6 8 µsVDD = 2.7 to 5.5 V 0 4 MHzVDD = 1.8 to 5.5 V 0 275 kHzVDD = 2.7 to 5.5 V 0.1 µsVDD = 1.8 to 5.5 V 1.8 µsInterrupt input high-/low-level widthRESET inputlow-level widthCPT90 input high-/low-level widthtINTH, tINTL INTP0 to INTP2 10 µstRSL 10 µstCPH, tCPL 10 µsTCY vs VDD6010Cycle time TCY [ µ s]1.0Guaranteedoperation range0.40.11 2 3 4 5 6Supply voltage VDD [V]202User’s Manual U14801EJ3V1<strong>UD</strong>
CHAPTER 15 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS)(2) Serial interface (TA = −40 to +85°C, VDD = 1.8 to 5.5 V)(a) 3-wire serial I/O mode (SCK20...Internal clock)Parameter Symbol Conditions MIN. TYP. MAX. UnitSCK20 cycle timetKCY1 VDD = 2.7 to 5.5 V 800 nsVDD = 1.8 to 5.5 V 3,200 nsSCK20 high-/lowlevelwidthSI20 setup time(to SCK20 ↑)SI20 hold time(from SCK20 ↑)Delay time fromSCK20 ↓ toSO20 outputtKH1, tKL1 VDD = 2.7 to 5.5 V tKCY1/2−50 nsVDD = 1.8 to 5.5 V tKCY1/2−150 nstSIK1 VDD = 2.7 to 5.5 V 150 nsVDD = 1.8 to 5.5 V 500 nstKSI1 VDD = 2.7 to 5.5 V 400 nsVDD = 1.8 to 5.5 V 600 nstKSO1 R = 1 kΩ,VDD = 2.7 to 5.5 V 0 250 nsC = 100 pF Note VDD = 1.8 to 5.5 V 0 1,000 nsNote R and C are the load resistance and load capacitance of the SO20 output line.(b) 3-wire serial I/O mode (SCK20...External clock)Parameter Symbol Conditions MIN. TYP. MAX. UnitSCK20 cycle timetKCY2 VDD = 2.7 to 5.5 V 800 nsVDD = 1.8 to 5.5 V 3,200 nsSCK20 high-/lowlevelwidthSI20 setup time(to SCK20 ↑)SI20 hold time(from SCK20 ↑)tKH2, tKL2 VDD = 2.7 to 5.5 V 400 nsVDD = 1.8 to 5.5 V 1,600 nstSIK2 VDD = 2.7 to 5.5 V 100 nsVDD = 1.8 to 5.5 V 150 nstKSI2 VDD = 2.7 to 5.5 V 400 nsVDD = 1.8 to 5.5 V 600 nsDelay time fromSCK20 ↓ toSO20 outputSO20 setup time(when using SS20,to SS20 ↓)SO20 disable time(when using SS20,from SS20↑)tKSO2tKAS2tKDS2R = 1 kΩ,VDD = 2.7 to 5.5 V 0 300 nsC = 100 pF Note VDD = 1.8 to 5.5 V 0 1000 nsVDD = 2.7 to 5.5 V 120 nsVDD = 1.8 to 5.5 V 400 nsVDD = 2.7 to 5.5 V 240 nsVDD = 1.8 to 5.5 V 800 nsNote R and C are the load resistance and load capacitance of the SO20 output line.User’s Manual U14801EJ3V1<strong>UD</strong> 203
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User’s ManualµPD789074 Subseries
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NOTES FOR CMOS DEVICES1VOLTAGE APPL
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Regional InformationSome informatio
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INTRODUCTIONReadersPurposeOrganizat
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Documents for Flash Memory WritingP
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CHAPTER 11 STANDBY FUNCTION .......
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LIST OF FIGURES (1/3)Figure No. Tit
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LIST OF FIGURES (3/3)Figure No. Tit
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LIST OF TABLES (2/2)Table No. Title
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CHAPTER 1 GENERAL1.2 Features• RO
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CHAPTER 1 GENERAL1.6 Pin Configurat
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CHAPTER 1 GENERALThe major function
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CHAPTER 1 GENERAL1.8 Block DiagramT
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CHAPTER 1 GENERAL1.10 Differences B
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CHAPTER 2 PIN FUNCTIONS(2) Non-port
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CHAPTER 2 PIN FUNCTIONS(h) RxD20, T
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CHAPTER 2 PIN FUNCTIONS2.3 Pin I/O
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CHAPTER 3 CPU ARCHITECTURE3.1 Memor
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CHAPTER 3 CPU ARCHITECTUREFigure 3-
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CHAPTER 3 CPU ARCHITECTURE3.1.1 Int
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CHAPTER 3 CPU ARCHITECTURE(a) Inter
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CHAPTER 3 CPU ARCHITECTURE3.2.2 Gen
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CHAPTER 3 CPU ARCHITECTURETable 3-3
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CHAPTER 3 CPU ARCHITECTURE3.3 Instr
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CHAPTER 3 CPU ARCHITECTURE3.3.3 Tab
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CHAPTER 3 CPU ARCHITECTURE3.4.2 Sho
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CHAPTER 3 CPU ARCHITECTURE3.4.4 Reg
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CHAPTER 3 CPU ARCHITECTURE3.4.6 Bas
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CHAPTER 4 PORT FUNCTIONSTable 4-1.
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CHAPTER 4 PORT FUNCTIONS4.2.2 Port
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CHAPTER 4 PORT FUNCTIONSFigure 4-5.
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CHAPTER 4 PORT FUNCTIONSFigure 4-7.
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CHAPTER 4 PORT FUNCTIONS4.3 Port Fu
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CHAPTER 4 PORT FUNCTIONS(3) Pull-up
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CHAPTER 5 CLOCK GENERATOR5.1 Clock
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CHAPTER 5 CLOCK GENERATOR5.4 System
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CHAPTER 5 CLOCK GENERATORFigure 5-4
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CHAPTER 5 CLOCK GENERATOR5.6 Changi
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Figure 6-1. Block Diagram of 16-Bit
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CHAPTER 6 16-BIT TIMER 906.3 Contro
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CHAPTER 6 16-BIT TIMER 90(2) Buzzer
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CHAPTER 6 16-BIT TIMER 906.4 Operat
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CHAPTER 6 16-BIT TIMER 906.4.2 Oper
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CHAPTER 6 16-BIT TIMER 906.4.4 16-b
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CHAPTER 6 16-BIT TIMER 906.5 Notes
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CHAPTER 7 8-BIT TIMER/EVENT COUNTER
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CHAPTER 8 WATCHDOG TIMER8.1 Watchdo
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CHAPTER 9 SERIAL INTERFACE 209.1 Fu
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Figure 9-2. Block Diagram of Baud R
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CHAPTER 9 SERIAL INTERFACE 209.3 Co
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CHAPTER 9 SERIAL INTERFACE 20(1) Op
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CHAPTER 9 SERIAL INTERFACE 20(4) Ba
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CHAPTER 9 SERIAL INTERFACE 20(b) Ge
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CHAPTER 9 SERIAL INTERFACE 209.4.2
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(d) Ba
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20(c) Tr
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CHAPTER 9 SERIAL INTERFACE 20(e) Re
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CHAPTER 9 SERIAL INTERFACE 20(3) Ca
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CHAPTER 9 SERIAL INTERFACE 20(b) As
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CHAPTER 9 SERIAL INTERFACE 20(2) Co
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CHAPTER 9 SERIAL INTERFACE 20Figure
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Page 151 and 152: CHAPTER 10 INTERRUPT FUNCTIONSTable
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Page 165 and 166: CHAPTER 11 STANDBY FUNCTION11.1 Sta
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Page 171 and 172: CHAPTER 12 RESET FUNCTIONThe follow
Page 173 and 174: CHAPTER 12 RESET FUNCTIONTable 12-1
Page 175 and 176: CHAPTER 13 µPD78F907613.1 Flash Me
Page 177 and 178: CHAPTER 13 µPD78F9076Figure 13-3.
Page 179 and 180: CHAPTER 13 µPD78F907613.1.3 On-boa
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Page 183 and 184: CHAPTER 13 µPD78F9076Figure 13-9.
Page 185 and 186: CHAPTER 14 INSTRUCTION SET OVERVIEW
Page 195 and 196: CHAPTER 15 ELECTRICAL SPECIFICATION
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Page 223 and 224: CHAPTER 18 RECOMMENDED SOLDERING CO
Page 225 and 226: APPENDIX A DEVELOPMENT TOOLSThe fol
Page 227 and 228: APPENDIX A DEVELOPMENT TOOLSA.1 Sof
Page 229 and 230: APPENDIX A DEVELOPMENT TOOLSA.4 Fla
Page 231 and 232: APPENDIX B NOTES ON TARGET SYSTEM D
Page 233 and 234: APPENDIX C REGISTER INDEXC.1 Regist
Page 235 and 236: APPENDIX C REGISTER INDEXC.2 Regist
Page 237 and 238: APPENDIX D REVISION HISTORYThe foll
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